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M41T94MH6F Datasheet(PDF) 22 Page - STMicroelectronics |
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M41T94MH6F Datasheet(HTML) 22 Page - STMicroelectronics |
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22 / 39 page ![]() Clock operations M41T94 22/39 DocID7564 Rev 8 4.6 Power-on reset The M41T94 continuously monitors VCC. When VCC falls to the power fail detect trip point, the RST pulls low (open drain) and remains low on power-up for tREC after VCC passes VPFD (max). The RST pin is an open drain output and an appropriate pull-up resistor should be chosen to control rise time. 4.7 Reset inputs (RSTIN1 & RSTIN2) The M41T94 provides two independent inputs which can generate an output reset. The duration and function of these resets is identical to a reset generated by a power cycle. Table 7 on page 23 and Figure 13 on page 23 illustrate the AC reset characteristics of this function. Pulses shorter than tRLRH1 and tRLRH2 will not generate a reset condition. RSTIN1 and RSTIN2 are each internally pulled up to VCC through a 100 kΩ resistor. Table 6. Square wave output frequency Square wave bits Square wave RS3 RS2 RS1 RS0 Frequency Units 0 0 0 0 None – 0 0 0 1 32.768 kHz 0 0 1 0 8.192 kHz 0 0 1 1 4.096 kHz 0 1 0 0 2.048 kHz 0 1 0 1 1.024 kHz 0 1 1 0 512 Hz 0 1 1 1 256 Hz 1 0 0 0 128 Hz 1 0 0 1 64 Hz 1 0 1 0 32 Hz 1 0 1 1 16 Hz 1 1 0 0 8 Hz 1 1 0 1 4 Hz 1 1 1 0 2 Hz 1 1 1 1 1 Hz |
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