Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

M41TC8025AMC5F Datasheet(PDF) 10 Page - STMicroelectronics

Part # M41TC8025AMC5F
Description  Highly accurate, temperature-compensated serial real-time clock (RTC) with embedded crystal
PDF  41 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M41TC8025AMC5F Datasheet(HTML) 10 Page - STMicroelectronics

Back Button M41TC8025AMC5F Datasheet HTML 6Page - STMicroelectronics M41TC8025AMC5F Datasheet HTML 7Page - STMicroelectronics M41TC8025AMC5F Datasheet HTML 8Page - STMicroelectronics M41TC8025AMC5F Datasheet HTML 9Page - STMicroelectronics M41TC8025AMC5F Datasheet HTML 10Page - STMicroelectronics M41TC8025AMC5F Datasheet HTML 11Page - STMicroelectronics M41TC8025AMC5F Datasheet HTML 12Page - STMicroelectronics M41TC8025AMC5F Datasheet HTML 13Page - STMicroelectronics M41TC8025AMC5F Datasheet HTML 14Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 10 / 41 page
background image
Operation
M41TC8025
10/41
DocID022873 Rev 4
2.2.5
Acknowledge
Each byte of eight bits is followed by one acknowledge bit. This acknowledge bit is a low
level put on the bus by the receiver whereas the master generates an extra acknowledge
related clock pulse. A slave receiver which is addressed is obliged to generate an
acknowledge after the reception of each byte that has been clocked out of the slave
transmitter.
The device that acknowledges has to pull down the SDA line during the acknowledge clock
pulse in such a way that the SDA line is a stable low during the high period of the
acknowledge related clock pulse. Of course, setup and hold times must be taken into
account. A master receiver must signal an end of data to the slave transmitter by not
generating an acknowledge on the last byte that has been clocked out of the slave. In this
case the transmitter must leave the data line high to enable the master to generate the
STOP condition.
Figure 5. Serial bus transfer sequence
Figure 6. Acknowledgement sequence
Obsolete
Product(s)
- Obsolete
Product(s)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com