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PCM1795DBRG4.B Datasheet(PDF) 45 Page - Texas Instruments |
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PCM1795DBRG4.B Datasheet(HTML) 45 Page - Texas Instruments |
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45 / 68 page ![]() 0.0005 0.0004 0.0003 0.0002 0.0001 0 0.0001 0.0002 0.0003 0.0004 0.0005 - - - - - Frequency( f ) ´ S 0 0.2 0.5 0.1 0.3 0.4 PassbandRipple SharpRoll-Off 0 2 4 6 8 10 12 14 16 18 20 - - - - - - - - - - Frequency( f ) ´ S 0 0.2 0.6 0.1 0.3 0.4 0.5 TransitionCharacteristics SlowRoll-Off PCM1795 www.ti.com SLES248A – MAY 2009 – REVISED MARCH 2015 8.2.2.2.5.1 FMT[2:0]: Audio Data Format Selection Default value: 000 Table 34. FMT[2:0] FMT[2:0] AUDIO DATA FORMAT SELECTION 000 16-bit right-justified format 001 32-bit right-justified format 010 24-bit right-justified format (default) Other N/A 8.2.2.2.5.2 OS[1:0]: ΔΣ Modulator Oversampling Rate Selection Default value: 00 Table 35. OS[1:0] OS[1:0] OPERATION SPEED SELECTION 00 8 times WDCK (default) 01 4 times WDCK 10 16 times WDCK 11 Reserved The effective oversampling rate is determined by the oversampling performed by both the external digital filter and the ΔΣ modulator. For example, if the external digital filter is 8× oversampling, and OS[1:0] = 00 is selected, then the ΔΣ modulator oversamples by 8×, resulting in an effective oversampling rate of 64×. The 16× WDCK oversampling rate is not available above a 100-kHz sampling rate. If the oversampling rate selected is 16× WDCK, the system clock frequency must be over 256 fS. 8.2.2.3 Application Curves Figure 61. Amplitude vs Frequency Figure 62. Amplitude vs Frequency Copyright © 2009–2015, Texas Instruments Incorporated Submit Documentation Feedback 45 Product Folder Links: PCM1795 |
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