Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

SN6501DBVT Datasheet(PDF) 15 Page - Texas Instruments

Part # SN6501DBVT
Description  SN6501 Transformer Driver for Isolated Power Supplies
PDF  38 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

SN6501DBVT Datasheet(HTML) 15 Page - Texas Instruments

Back Button SN6501DBVT Datasheet HTML 11Page - Texas Instruments SN6501DBVT Datasheet HTML 12Page - Texas Instruments SN6501DBVT Datasheet HTML 13Page - Texas Instruments SN6501DBVT Datasheet HTML 14Page - Texas Instruments SN6501DBVT Datasheet HTML 15Page - Texas Instruments SN6501DBVT Datasheet HTML 16Page - Texas Instruments SN6501DBVT Datasheet HTML 17Page - Texas Instruments SN6501DBVT Datasheet HTML 18Page - Texas Instruments SN6501DBVT Datasheet HTML 19Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 15 / 38 page
background image
8 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
8.1 Application Information
The SN6501 is a transformer driver designed for low-cost, small form-factor, isolated DC-DC converters utilizing
the push-pull topology. The device includes an oscillator that feeds a gate-drive circuit. The gate-drive,
comprising a frequency divider and a break-before-make (BBM) logic, provides two complementary output
signals which alternately turn the two output transistors on and off.
Vcc
GND
GND
D2
SN6501
D1
S
S
G2
G1
fOSC
Freq.
Divider
OSC
BBM
Logic
Q1
Q2
Q1 on
Q2 on
Q2 off
tBBM
Q1 off
Figure 8-1. SN6501 Block Diagram And Output Timing With Break-Before-Make Action
The output frequency of the oscillator is divided down by an asynchronous divider that provides two
complementary output signals, S and S, with a 50% duty cycle. A subsequent break-before-make logic inserts a
dead-time between the high-pulses of the two signals. The resulting output signals, G1 and G2, present the gate-
drive signals for the output transistors Q1 and Q2. As shown in Figure 8-2, before either one of the gates can
assume logic high, there must be a short time period during which both signals are low and both transistors are
high-impedance. This short period, known as break-before-make time, is required to avoid shorting out both
ends of the primary.
f
OSC
S
S
G
1
G
2
Q
1
Q
2
Figure 8-2. Detailed Output Signal Waveforms
www.ti.com
SN6501
SLLSEA0I – FEBRUARY 2012 – REVISED JANUARY 2021
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
15
Product Folder Links: SN6501



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com