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SN74LVC2G06DBVR Datasheet(PDF) 11 Page - Texas Instruments |
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SN74LVC2G06DBVR Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 33 page ![]() VCC Unused Input Input Output Output Input Unused Input Frequency - MHz 0 20 40 60 80 0 200 400 600 800 1000 1200 1400 1600 D001 Icc 1.8V Icc 2.5V Icc 3.3V Icc 5V SN74LVC2G06 www.ti.com SCES307J – AUGUST 2001 – REVISED JULY 2015 Typical Application (continued) 9.2.3 Application Curve Figure 5. ICC vs Frequency 10 Power Supply Recommendations The power supply can be any voltage between the min and max supply voltage rating located in the Recommended Operating Conditions table. Each VCC pin must have a good bypass capacitor in order to prevent power disturbance. For devices with a single supply, a 0.1- μF capacitor is recommended and if there are multiple VCC pins then a 0.01-μF or 0.022-μF capacitor is recommended for each power pin. It is ok to parallel multiple bypass caps to reject different frequencies of noise. 0.1- μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor should be installed as close to the power pin as possible for best results. 11 Layout 11.1 Layout Guidelines When using multiple bit logic devices, inputs must never float. In many cases, functions or parts of functions of digital logic devices are unused. Examples include when only two inputs of a triple input and gate are used or when only three of the four buffer gates are used. Avoid leaving input pins unconnected because the undefined voltages at the outside connections result in undefined operational states. Observe the following rules under all circumstances. Connect all unused inputs of digital logic devices to a high or low bias to prevent them from floating. Based on the function of the device, apply the logic level to any unused input. Based on convenience, tie unused inputs to the GND or the VCC. 11.2 Layout Example Figure 6. Layout Recommendation Copyright © 2001–2015, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: SN74LVC2G06 |
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