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AM620-Q1 Datasheet(PDF) 56 Page - Texas Instruments |
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AM620-Q1 Datasheet(HTML) 56 Page - Texas Instruments |
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56 / 276 page  5.3.2.1 MAIN Domain Table 5-6. CPTS Signal Descriptions SIGNAL NAME [1] PIN TYPE [2] DESCRIPTION [3] ALW PIN [4] AMC PIN [4] CP_GEMAC_CPTS0_RFT_CLK I CPTS Reference Clock Input A18 C14 CP_GEMAC_CPTS0_TS_COMP O CPTS Time Stamp Counter Compare Output from CPSW3G0 CPTS C13, D22 C19, D13 CP_GEMAC_CPTS0_TS_SYNC O CPTS Time Stamp Counter Bit Output from CPSW3G0 CPTS A14, C21 B20, D12 CP_GEMAC_CPTS0_HW1TSPUSH I CPTS Hardware Time Stamp Push Input to Time Sync Router B13, B21 B19, C12 CP_GEMAC_CPTS0_HW2TSPUSH I CPTS Hardware Time Stamp Push Input to Time Sync Router A22, B14 A14, A19 SYNC0_OUT O CPTS Time Stamp Generator Bit 0 Output from Time Sync Router B16 E12 SYNC1_OUT O CPTS Time Stamp Generator Bit 1 Output from Time Sync Router A18 C14 SYNC2_OUT O CPTS Time Stamp Generator Bit 2 Output from Time Sync Router C15 B13 SYNC3_OUT O CPTS Time Stamp Generator Bit 3 Output from Time Sync Router E15 A15 5.3.3 CSI-2 5.3.3.1 MAIN Domain Table 5-7. CSIRX0 Signal Descriptions SIGNAL NAME [1] PIN TYPE [2] DESCRIPTION [3] ALW PIN [4] AMC PIN [4] CSI0_RXCLKN I CSI-2 Differential Receive Clock Input (negative) AD15 AA14 CSI0_RXCLKP I CSI-2 Differential Receive Clock Input (positive) AE15 AA13 CSI0_RXRCALIB (1) A CSI-2 D-PHY connection to external calibration resistor AA14 T11 CSI0_RXN0 I CSI-2 Differential Receive Input (negative) AB14 Y13 CSI0_RXN1 I CSI-2 Differential Receive Input (negative) AD14 V13 CSI0_RXN2 I CSI-2 Differential Receive Input (negative) AD13 U12 CSI0_RXN3 I CSI-2 Differential Receive Input (negative) AB12 W12 CSI0_RXP0 I CSI-2 Differential Receive Input (positive) AC15 Y12 CSI0_RXP1 I CSI-2 Differential Receive Input (positive) AE14 V12 CSI0_RXP2 I CSI-2 Differential Receive Input (positive) AE13 U11 CSI0_RXP3 I CSI-2 Differential Receive Input (positive) AC13 W11 (1) An external 499 Ω ±1% resistor must be connected between this pin and VSS and the maximum power dissipation for the resistor is 7.2mW. No external voltage should be applied to this pin. 5.3.4 DDRSS 5.3.4.1 MAIN Domain Table 5-8. DDRSS0 Signal Descriptions SIGNAL NAME [1] PIN TYPE [2] DESCRIPTION [3] ALW PIN [4] AMC PIN [4] DDR0_ACT_n O DDRSS Activation Command N6 M1 DDR0_ALERT_n IO DDRSS Alert R3 N1 DDR0_CAS_n O DDRSS Column Address Strobe M4 J3 DDR0_PAR O DDRSS Command and Address Parity T1 M2 DDR0_RAS_n O DDRSS Row Address Strobe M5 K5 AM625, AM625-Q1, AM623, AM620-Q1 SPRSP58C – JUNE 2022 – REVISED OCTOBER 2025 www.ti.com 56 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: AM625 AM625-Q1 AM623 AM620-Q1 |
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