Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

LTC1065 Datasheet(PDF) 13 Page - Analog Devices

Part # LTC1065
Description  14-Bit DC Accurate Clock-Tunable, 8th Order Elliptic or Linear Phase Lowpass Filter
PDF  20 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTC1065 Datasheet(HTML) 13 Page - Analog Devices

Back Button LTC1065 Datasheet HTML 9Page - Analog Devices LTC1065 Datasheet HTML 10Page - Analog Devices LTC1065 Datasheet HTML 11Page - Analog Devices LTC1065 Datasheet HTML 12Page - Analog Devices LTC1065 Datasheet HTML 13Page - Analog Devices LTC1065 Datasheet HTML 14Page - Analog Devices LTC1065 Datasheet HTML 15Page - Analog Devices LTC1065 Datasheet HTML 16Page - Analog Devices LTC1065 Datasheet HTML 17Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 13 / 20 page
background image
LTC1066-1
13
10661fa
0
–26
–85
INPUT FREQUENCY
1066-1 F07
fCLK – fC
2fCLK – fC
2fCLK – 4fC
fCLK – 4fC
fCLK + 4fC
2fCLK + 4fC
fCLK + fC
2fCLK + fC
fCLK
2fCLK
0
–60
–80
INPUT FREQUENCY
1066-1 F06
fCLK – fC
2fCLK – fC
2fCLK – 2.3fC
2fCLK + 2.3fC
fCLK + fC
2fCLK + fC
fCLK
2fCLK
APPLICATIONS INFORMATION
Aliasing
In a sampled-data system the sampling theorem says that
if an input signal has any frequency components greater
than one half the sampling frequency, aliasing errors will
appear at the output. In practice, aliasing is not always a
serious problem. High order switched-capacitor lowpass
filters are inherently band limited and significant aliasing
occurs only for input signals centered around the clock
frequency and its multiples.
Figure 6 shows the LTC1066-1 aliasing response when
operated with a clock-to-cutoff frequency ratio of 50:1.
With a 50:1 ratio LTC1066-1 samples its input twice
during one clock period and the sampling frequency is
equal to two times the clock frequency.
The figure also shows the maximum aliased output gener-
ated for inputs in the range of 2fCLK ±fC. For instance, if the
LTC1066-1 is programmed to produce a cutoff frequency
of 20kHz with 1MHz clock, a 10mV, 1.02MHz input signal
will cause a 10
µV aliased signal at 20kHz. This signal will
be buried in the noise. Maximum aliasing will occur only
for input signals in the narrow range of 2MHz
±20kHz or
multiples of 2MHz.
Figure 7 shows the LTC1066-1 aliased response when
operated with a clock-to-cutoff frequency ratio of 100:1
(linear phase response with pin 8 to ground).
Figure 6. Aliasing vs Frequency
fCLK/fC = 50:1 (Pin 8 to V
+)
Clock is a 50% Duty Cycle Square Wave
Figure 7. Aliasing vs Frequency
fCLK/fC = 100:1 (Pin 8 to Ground)
Clock is a 50% Duty Cycle Square Wave



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com