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HCTS85DMSR Datasheet(PDF) 1 Page - Intersil Corporation

Part # HCTS85DMSR
Description  Radiation Hardened 4-Bit Magnitude Comparator
PDF  9 Pages
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

HCTS85DMSR Datasheet(HTML) 1 Page - Intersil Corporation

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1
TM
Ordering Information
PART NUMBER
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
HCTS85DMSR
-55oC to +125oC
Intersil Class S Equivalent
16 Lead SBDIP
HCTS85KMSR
-55oC to +125oC
Intersil Class S Equivalent
16 Lead Ceramic Flatpack
HCTS85D/Sample
+25
oC
Sample
16 Lead SBDIP
HCTS85K/Sample
+25oC
Sample
16 Lead Ceramic Flatpack
HCTS85HMSR
+25oCDie
Die
HCTS85MS
Radiation Hardened
4-Bit Magnitude Comparator
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE
(SBDIP) MIL-STD-1835 CDIP2-T16, LEAD FINISH C
TOP VIEW
16 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
(FLATPACK) MIL-STD-1835 CDFP4-F16, LEAD FINISH C
TOP VIEW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
B3
(A<B)IN
(A=B)IN
(A>B)IN
(A<B)OUT
(A=B)OUT
GND
(A>B)OUT
VCC
B2
A2
A1
B1
A0
B0
A3
2
3
4
5
6
7
8
116
15
14
13
12
11
10
9
B3
(A<B)IN
(A=B)IN
(A>B)IN
(A<B)OUT
(A=B)OUT
GND
(A>B)OUT
VCC
B2
A2
A1
B1
A0
B0
A3
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/
Bit-Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Fanout (Over Temperature Range)
-Standard Outputs: 10 LSTTL Loads
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
-VIL = 0.8V Max
-VIH = VCC/2 Min
• Input Current Levels Ii
≤ 5µA at VOL, VOH
Description
The Intersil HCTS85MS is a Radiation Hardened 4-bit high
speed magnitude comparator. This device compares two
binary, BCD, or other monotonic codes and presents the
three possible magnitude results at the outputs (A>B, A<B,
and A=B). The 4-bit input words are weighted (A0 to A3 and
B0 to B3), where A3 and B3 are the most significant bits.
The HCTS85MS is expandable without external gating, both
serial and parallel operation.
The HCTS85MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family
with TTL input compatibility.
The HCTS85MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
September 1995
Spec Number
518624
FN3059.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved


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