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L9362 Datasheet(PDF) 4 Page - STMicroelectronics |
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L9362 Datasheet(HTML) 4 Page - STMicroelectronics |
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4 / 17 page ![]() L9362 4/17 ELECTRICAL CHARACTERISTICS 4.5V ≤ VCC ≤ 5.5V, -40°C ≤ TJ ≤ 125°C, unless otherwise specified. Symbol Parameter Test Conditions Min. Typ. Max. Unit Supply current ICCRES Standby current Without load. Tj ≤ 85°C NRES = LOW 1.3 mA ICCOPM Operating mode IOUT 1 ... 4 = 2A 11 17 mA ICCLV Low voltage supply current VCC < 0,5V 80 µA Inputs (NONx; NCS; CLK; NRES; SDI) VINL Low threshold -0.3 0.2 • VCC V VINH High threshold 0.7 • VCC VCC +0.3 V Vhyst Hysteresis 0.85 V IIN Input leakage current VIN = VCC 10 µA IIN Input current (NONx, NCS, CLK, SDI) VIN ≤ 0.8•VCC 20 100 µA IIN NRES Input current NRES 3 20 µA Serial Data Output VSDOH High output level (ISDO = -2mA) VCC - 0.4 V VSDOL Low output level (ISDO = 3.2mA) 0.4 V ISDOL Tristate leakage current (NCS = HIGH; VSDO = 0V ... VCC) -10 10 µA Outputs (Out 1 ... 4) IOUTL1 Leakage current 1 (NON = HIGH; VOUT = 14V; VCC = 5V) 10 µA Vclpa Output clamp voltage Vclpa (IOUT = 0.5A) 45 50 60 V WOFF Clamped energy at the switching OFF 1) For 2ms, see fig. 8 50 mJ RDSON ON resistance IOUT = 2A; Tj = 150°C; Tj = 25°C 2) 250 500 300 m Ω m Ω OVRp1 OVRp2 Positive output voltage ramp (with inductive load) VOUT = 30% ... 80% of VBAT=16V 3) VOUT = VBAT ... 0.9 • Vclp 3) 0.3 0.75 0.9 1.35 2.25 V/ µs V/ µs OVRn Negative output voltage ramp 80% ... 30% of VBAT = 16V with inductive load 3) 0.3 0.9 1.35 V/ µs tdON Turn ON delay NON = 50%; VOUT = 0.8 • VBAT 04 10 µs tdOFF Turn OFF delay NON = 50%; VOUT = 0.3 • VBAT 04 10 µs Note 1: Typical loads for the zener clamping and the output voltage ramps are: a) 10 Ω, 16mH at all outputs or b) 25 Ω, 160mH Note 2: At 150°C guaranteed by design and electrical characterisation Note 3: Tested with resistive load of Rload = 50Ω |
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