PRELIMINARY
CY2XP306
Document #: 38-07725 Rev. *A
Page 2 of 9
Pin Definitions
Pin #
Pin Name
Pin Description
A2
XIN/REF
Reference Crystal Input or LVTTL
A3
XOUT
Reference Crystal Feedback
B2,B5,C1,G2,G5,A4
GND
Ground
A5,H1,H2,H4,H5
VDDA
3.3V Power Supply
A1,B1,G3,G4
VDDB
3.3V Power Supply
A6
QA1
LVPECL Clock Output
B6
QA1#
LVPECL Clock Output (Complement)
C6
QA2
LVPECL Clock Output
D6
QA2#
LVPECL Clock Output (Complement)
E6
QA3
LVPECL Clock Output
F6
QA3#
LVPECL Clock Output (Complement)
G6
QB1
LVPECL Clock Output
H6
QB1#
LVPECL Clock Output (Complement)
C4
QB2
LVPECL Clock Output
C3
QB2#
LVPECL Clock Output (Complement)
F4
QB3
LVPECL Clock Output
F3
QB3#
LVPECL Clock Output (Complement)
D1
PLL_MULT PLL Multiplier Select Input, Internal pull-up resistor, see Frequency Table
E1
MR
LVPECL Reset; Internal Pull-Down, see Function Table
F1
FSELA
LVPECL Output Divider Select; Internal Pull-Down, see Output Frequency Table
G1
FSELB
LVPECL Output Divider Select; Internal Pull-Down, see Output Frequency Table
H3
NC
No Connect
B4
SER_DATA Serial Interface Data
B3
SER_CLK Serial Interface Clock
Table 1. Frequency Table
PLL_Mult
M (PLL Multiplier)
Example Input Frequency
Example PLL Output Frequency
0
x16
19.44 MHz
311.04 MHz
19.53 MHz
312.5 MHz
1
x8
19.44 MHz
155.52 MHz
19.53 MHz
156.25 MHz
38.88 MHz
311.04 MHz
Table 2. Output Frequency Table
Control Pin
0
1
FSELA
QAx = PLL Output Frequency
QAx = PLL Output Frequency/2
FSELB
QBx = PLL Output Frequency
QBx = PLL Output Frequency/2
Table 3. Function Table
Control Pin
0
1
MR (Asynchronous)
Active
Reset (QX = Low, QX# = High)
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