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CY7C344B-15WC/WI Datasheet(PDF) 3 Page - Cypress Semiconductor

Part # CY7C344B-15WC/WI
Description  32-Macrocell MAX짰 EPLD
PDF  12 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C344B-15WC/WI Datasheet(HTML) 3 Page - Cypress Semiconductor

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USE ULTRA37000™ FOR
ALL NEW DESIGNS
CY7C344B
Document #: 38-03036 Rev. *D
Page 3 of 12
Design Recommendations
Operation of the devices described herein with conditions
above those listed under “Absolute Maximum Ratings” may
cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any
other conditions above those indicated in the operational
sections of this data sheet is not implied. Exposure to absolute
maximum ratings conditions for extended periods of time may
affect device reliability. The CY7C344B contains circuitry to
protect device pins from high-static voltages or electric fields;
however, normal precautions should be taken to avoid
applying any voltage higher than maximum rated voltages.
For proper operation, input and output pins must be
constrained to the range GND
≤ (VIN or VOUT) ≤ VCC. Unused
inputs must always be tied to an appropriate logic level (either
VCC or GND). Each set of VCC and GND pins must be
connected together directly at the device. Power supply
decoupling capacitors of at least 0.2
µF must be connected
between VCC and GND. For the most effective decoupling,
each VCC pin should be separately decoupled.
Timing Considerations
Unless otherwise stated, propagation delays do not include
expanders. When using expanders, add the maximum
expander delay tEXP to the overall delay.
When calculating synchronous frequencies, use tSU if all
inputs are on the input pins. When expander logic is used in
the data path, add the appropriate maximum expander delay,
tEXP to tSU. Determine which of 1/(tWH + tWL), 1/tCO1, or 1/(tEXP
+ tSU) is the lowest frequency. The lowest of these frequencies
is the maximum data-path frequency for the synchronous
configuration.
When calculating external asynchronous frequencies, use
tAS1 if all inputs are on dedicated input pins.
When expander logic is used in the data path, add the appro-
priate maximum expander delay, tEXP to tAS1. Determine
which of 1/(tAWH + tAWL), 1/tACO1, or 1/(tEXP + tAS1) is the
lowest frequency. The lowest of these frequencies is the
maximum data-path frequency for the asynchronous configu-
ration.
The parameter tOH indicates the system compatibility of this
device when driving other synchronous logic with positive
input hold times, which is controlled by the same synchronous
clock. If tOH is greater than the minimum required input hold
time of the subsequent synchronous logic, then the devices
are guaranteed to function properly with a common
synchronous clock under worst-case environmental and
supply voltage conditions.
Typical ICC vs. fMAX
Output Drive Current
240
180
120
60
1 kHz
10 kHz
100 kHz 1 MHz
MAXIMUM FREQUENCY
10 MHz
0
50 MHz
100 Hz
VCC =5.0V
Room Temp.
01
2
3
4
VO OUTPUTVOLTAGE (V)
250
200
150
100
50
5
IOH
IOL
VCC =5.0V
Room Temp.



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