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MAX98309/MAX98310

Mono 1.4W Class AB Audio Amplifiers

The increase in power delivered by the BTL configuration

directly results in an increase in internal power dissipa-

tion over the single-ended configuration. The maximum

internal power dissipation for a given VDD and load is

given by the following equation:

2

DD

D(MAX)

2

L

2V

P

R

=

π

If the internal power dissipation for a given application

exceeds the maximum allowed for a given package,

reduce power dissipation by increasing the ground plane

heatsinking capability and the size of the traces to the

device. See the Layout and Grounding section. Other

methods for reducing power dissipation are to reduce

VDD, increase load impedance, decrease ambient

temperature, reduce gain, or reduce input signal.

Thermal-overload protection limits total power dissipation

in the MAX98309/MAX98310. When the junction temper-

ature exceeds +160NC, the thermal protection circuitry

disables the amplifier. Operation returns to normal once

the die cools by 15NC.

Amplifier Gain

Fixed Differential Gain (MAX98310)

The MAX98310 features four internally fixed differential

gain options selectable by GAIN (Table 1). This simplifies

design, decreases required application footprint size, and

eliminates external gain-setting resistors.

External Differential Gain (MAX98309)

The MAX98309 features an external gain option. Resistors

RF and RIN. See the Simplified Block Diagram and set the

gain of the amplifier as follows:

F

V

IN

R

A

R

=

where AV is the desired voltage gain. Hence, an RIN of

10kI and an RF of 20kI yields a gain of 2V/V or 6dB.

RF can be either fixed or variable, allowing the use of a

digitally controlled potentiometer to alter the gain under

software control.

Input Filter

The fully differential amplifier inputs can be biased at

voltages other than midsupply. The common-mode

feedback circuit adjusts for input bias, ensuring the out-

puts are still biased at midsupply. Input capacitors are

not required as long as the input voltage is within the

specified common-mode range listed in the Electrical

Characteristics table.

If input capacitors are used, input capacitor CIN, in con-

junction with the input resistor RIN, forms a highpass filter

that removes the DC bias from an incoming signal. The

AC-coupling capacitor allows the amplifier to bias the sig-

nal to an optimum DC level. Assuming zero-source imped-

ance, the -3dB point of the highpass filter is given by:

3dB

IN IN

1

f

2 R C

−

=

π

Setting f-3dB too high affects the low-frequency response

of the amplifier. Use capacitors with adequately low volt-

age coefficients, such as X7R ceramic capacitors with a

high voltage rating. Capacitors with higher voltage coef-

ficients result in increased distortion at low frequencies.

BIAS Capacitor

BIAS is the output of the internally generated VDD/2 bias

voltage. The BIAS bypass capacitor, CBIAS, improves

PSRR and THD+N by reducing power supply and other

noise sources at the common-mode bias node, and also

generates the clickless/popless startup DC bias wave-

form for the speaker amplifiers. Bypass BIAS with a 0.1FF

capacitor to GND. Larger values of CBIAS (up to 1FF)

improve PSRR.

Supply Bypassing

Proper power-supply bypassing ensures low-noise, low-

distortion performance. Connect a 1FF ceramic capacitor

from VDD to GND. Add additional bulk capacitance as

required by the application. Locate the bypass capacitor

as close as possible to the device.

Layout and Grounding

Good PCB layout is essential for optimizing performance.

Use large traces for the power-supply inputs and amplifier

outputs to minimize losses due to parasitic trace resis-

tance and route heat away from the device. Good ground-

ing improves audio performance, and prevents any digital

switching noise from coupling into the audio signal.

Table1.FixedDifferentialGain

GAINCONNECTION

GAIN(dB)

VDD

0

GND

3

Unconnected

6

BIAS

9