WM9715LGEFLSLASHRV datasheet(57/77 Pages) WOLFSON

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Production Data

WM9715L

PD Rev 4.0 December 2007

UNUSED ANALOGUE INPUTS AND OUTPUTS

When analogue inputs or outputs are disabled, they remain internally connected to VREF (AVDD/2)

through a large resistor. This maintains the potential at that node and helps to eliminate pops when

the pins are re-enabled.

There are several exceptions to this. Firstly, when VREF itself is disabled (PR3 = 1 in register 26h),

unused analogue pins are not held at AVDD/2. Additionally:

•

The MIC1 input is disconnected from VREF if all of the following register settings are

applied:

PD0 = 1 in register 24h

AND PR0 = 1 in register 26h

AND MS = 00 in register 0Eh

AND (RECSL = 000 or RECSR = 000 in register 1Ah)

•

The MIC2 input is disconnected from VREF if all of the following register settings are

applied:

PD0 = 1 in register 24h

AND PR0 = 1 in register 26h

AND MS = 10 in register 0Eh

AND (RECSL = 000 or RECSR = 000 in register 1Ah)

•

The PCBEEP input is disconnected from VREF if PR2 = 1 in register 26h

•

The PCBEEP input is also disconnected from VREF if the exact following register

settings are applied:

PD9 = 1 in register 24h or B2H = 1 in register 0Ah

AND (PD8 = 1 in register 24h or B2H = 1 in register 0Ah)

AND (PD7 = 1 in register 24h or B2S = 1 in register 0Ah)

AND (PD6 = 1 in register 24h or B2P = 1 in register 0Ah)

For MIC1 and MIC2, pop issues can be circumvented by disconnecting the microphone inputs from

the record selector (RECSL = RECSR = 001 in register 1Ah) in sleep or standby modes.

However, should it be necessary to maintain the VREF potential at MIC1, MIC2 or PCBEEP, this can

be achieved by choosing any suitable register settings that are not identical to those shown above.

WM9715LGEFL/RV Datasheet(PDF) 57 Page - Wolfson Microelectronics plc