DIGITAL TIMER APPLICATION

A positive MASTER RESET pulse clears the

counters and latch. The output goes high and keeps

up till the number of pulses, selected by A and B, are

counted. This circuit is retriggerable and is as accur-

ate as the input frequency. If a more accurate circuit

is desired, an external clock can be used on pin 3.

A set-up time equal to the width of the one shot out-

put is required immediately following initial power

up, during which time the output will be high.

FREQUENCY SELECTION TABLE

TRUTH TABLE

AB

N

° of Stages

N

Count

2

N

0

0

13

8192

0

1

10

1024

1

0

18

256

1

1

16

65536

Pin

State

01

5

Auto Reset On

Auto Reset Disable

6

Master Reset Off

Master Reset On

9

Output Initially

Low After Reset (Q)

Output Initially

High After Reset (Q)

10

Single Transition Mode

Recycle Mode

HCC/HCF4541B

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