M95512-R datasheet(23/39 Pages) STMICROELECTRONICS

23 / 39 page

M95512-W, M95512-R

Instructions

23/39

Regardless of the order of the two events, the Hardware Protected Mode (HPM) can be

entered:

●

by setting the Status Register Write Disable (SRWD) bit after driving Write Protect (W)

Low

●

or by driving Write Protect (W) Low after setting the Status Register Write Disable

(SRWD) bit.

The only way to exit the Hardware Protected Mode (HPM) once entered is to pull Write

Protect (W) High.

If Write Protect (W) is permanently tied High, the Hardware Protected Mode (HPM) can

never be activated, and only the Software Protected Mode (SPM), using the Block Protect

(BP1, BP0) bits of the Status Register, can be used.

6.5

Read from Memory Array (READ)

As shown in Figure 11, to send this instruction to the device, Chip Select (S) is first driven

Low. The bits of the instruction byte and address bytes are then shifted in, on Serial Data

Input (D). The address is loaded into an internal address register, and the byte of data at

that address is shifted out, on Serial Data Output (Q).

If Chip Select (S) continues to be driven Low, the internal address register is automatically

incremented, and the byte of data at the new address is shifted out.

When the highest address is reached, the address counter rolls over to zero, allowing the

Read cycle to be continued indefinitely. The whole memory can, therefore, be read with a

single READ instruction.

The Read cycle is terminated by driving Chip Select (S) High. The rising edge of the Chip

Select (S) signal can occur at any time during the cycle.

The first byte addressed can be any byte within any page.

The instruction is not accepted, and is not executed, if a Write cycle is currently in progress.

Figure 11.

Read from Memory Array (READ) sequence

AI01793D

3456789 10

20 21 22 23 24 25 26 27

14 13

3210

28 29 30

76543

High Impedance

Data Out 1

Instruction

16-Bit Address

MSB

Data Out 2

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