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MPQ9840GL Datasheet(PDF) 21 Page - Monolithic Power Systems |
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MPQ9840GL Datasheet(HTML) 21 Page - Monolithic Power Systems |
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21 / 34 page ![]() MPQ9840 – 36V, 3.5A, LOW IQ, SYNC STEP-DOWN CONVERTER, AEC-Q100 MPQ9840 Rev. 1.02 www.MonolithicPower.com 21 7/1/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. OPERATION The MPQ9840 is a synchronous, step-down, switching regulator with integrated, internal, high-side and low-side power MOSFETs. The MPQ9840 provides 3.5A of highly efficient output current with current mode control. The MPQ9840 features a wide input voltage range, switching frequency programmable from 350kHz to 2.5MHz, external soft start, and precision current limit. Its very low operational quiescent current makes it suitable for battery- powered applications. Pulse-Width Modulation (PWM) Control At moderate-to-high output currents, the MPQ9840 operates in a fixed-frequency, peak- current-control mode to regulate the output voltage. A pulse-width modulation (PWM) cycle is initiated by the internal clock. At the rising edge of the clock, the high-side power MOSFET (HS-FET) is turned on and remains on until its current reaches the value set by the COMP voltage (VCOMP). If the current in the HS- FET does not reach VCOMP in one PWM period, the HS-FET remains on, saving a turn-off operation. When the high-side power switch is off, the low- side MOSFET (LS-FET) is turned on immediately and remains on until the next cycle begins. For each turn-on and -off in a switching cycle, the HS-FET turns on and off with a minimum on and off time limit. Advanced Asynchronous Mode (AAM) The MPQ9840 employs advanced asynchronous mode (AAM) functionality to optimize efficiency during light-load or no-load conditions. AAM can be enabled by connecting SYNC to a low level (<0.4V) before start-up; CCM can be able when connecting SYNC to a high level (>1.8V) before start-up. SYNC can be used to synchronize switching again after start- up. If continuous conduction mode (CCM) is enabled, the device is forced to work with a fixed frequency regardless of the output load current. The advantage of CCM is the controllable frequency and smaller output ripple, but it also has low efficiency at light load (see Figure 2). If AAM is enabled, the MPQ9840 first enters non-synchronous operation for as long as the inductor current is approaching zero at light load. If the load is further decreased or is at no load, VCOMP drops below the AAM voltage (VAAM), making the MPQ9840 enter power-save mode (PSM). This puts the chip into sleep mode, which consumes very low quiescent current to further improve light-load efficiency. In PSM, the internal clock is reset whenever VCOMP crosses over VAAM, and the crossover time is taken as the benchmark of the next clock. When the load increases, and the DC value of VCOMP is higher than VAAM, the operation mode is discontinuous conduction mode (DCM) or CCM, which have a constant switching frequency. AAM (SYNC = Low) Inductor Current t t t Load Decreased Forced CCM (SYNC = High) Inductor Current t t t Load Decreased Figure 2 : AAM and Forced CCM Error Amplifier (EA) The error amplifier (EA) compares the FB voltage with the internal reference (0.8V) and outputs a current proportional to the difference between the two. This output current is used to charge or discharge the internal compensation network to form VCOMP, which is used to control the power MOSFET current. The optimized internal compensation network minimizes the external component count and simplifies the control loop design. Bootstrap Charging The bootstrap capacitor (0.1µF to 1µF) is charged and regulated to about 5V by the dedicated internal bootstrap regulator. When the voltage between the BST and SW nodes is lower than its regulation, a PMOS pass transistor connected from VIN to BST is turned on. The charging current path is from VIN to |
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