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MC33897AD/R2 Datasheet(PDF) 14 Page - Freescale Semiconductor, Inc |
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MC33897AD/R2 Datasheet(HTML) 14 Page - Freescale Semiconductor, Inc |
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14 / 20 page ![]() Analog Integrated Circuit Device Data 14 Freescale Semiconductor 33897/A/B/C/D/T FUNCTIONAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM COMPONENTS diode is generally used to protect the entire module from reverse battery and should be selected accordingly. BUS I/O This input/output may require electrostatic discharge (ESD) and/or EMI external circuitry. A set of components is shown in the simplified application diagrams on page 16 of this datasheet. The value of the capacitor should be adjusted downward in direct proportion to the added capacitance of the ESD or EMI circuits. The series resistance of the inductor should be kept below 3.5 Ω to prevent its voltage drop from significantly degrading system noise margins. FUNCTIONAL BLOCK DIAGRAM COMPONENTS Timer OSC This circuit generates a 500 kHz signal to be used for internal logic. It is the reference for some of the required delays. Timers This circuit contains the timing logic used to hold the CNTL active for the required time after the conditions for sleep mode have been met. It is also used to keep the TXD driver active for a period of time after it has generated a passive level on the bus. Mode Control This circuit contains the control logic for the various operating modes and conditions required for the IC. BUS RCVR This circuit translates the levels on the BUS terminal to a CMOS level indicating the presence of a logic [0] or a logic [1]. It also determines the presence of a high-voltage wake-up (HVWU) signal that is passed to Mode Control and Timers circuits. An analog filter is used to “de-glitch” the high- voltage wake-up signal and prevent false exits from the sleep mode. TXD BUS DRVR This circuit drives the BUS. It can drive it with the higher voltage wake-up signals when enabled by the Mode Control circuit. It can also provide waveshaping for reduced EMI or not provide it for the higher data rate mode. The actual data is received on TXD at CMOS logic levels, then translated by this circuit to the necessary operating voltages. Undervoltage Detect This circuit monitors internal operating voltage to assure proper operation of the part. If a low-voltage condition is detected, it sends a signal to disable the BUS RCVR and TXD BUS DRVR circuits. This prevents incorrect data from being put on the bus or sent to the MCU. Load Switch The LOAD switch provides a path for an external resistor connected to the BUS to be connected to ground. When a loss of ground is detected, this switch is opened to prevent the current that would normally be flowing to the ground from the module from going back through the load resistor and raising the bus level. The circuit is opened when the voltage between GND and VBATT becomes too low as would be the case if module ground were lost. |
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