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EM44AM1684LBA Datasheet(PDF) 28 Page - Eorex Corporation |
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EM44AM1684LBA Datasheet(HTML) 28 Page - Eorex Corporation |
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28 / 29 page ![]() eorex EM44AM1684LBA Jul. 2006 www.eorex.com OCD impedance adjust To adjust output driver impedance, controllers must issue the ADJUST EMRS(1) command along with a 4 bit burst code to DDR2 SDRAM as in the following table. For this operation, Burst Length has to be set to BL = 4 via MRS command before activating OCD and controllers must drive the burst code to all DQs at the same time. DT0 is the table means all DQ bits at bit time 0, DT1 at bit time 1, and so forth. The driver output impedance is adjusted for all DDR2 SDRAM DQs simultaneously and after OCD calibration, all DQs of a given DDR2 SDRAM will be adjusted to the same driver strength setting. The maximum step count for adjustment can be up to 16 and when the limit is reached, further increment or decrement code has no effect. The default setting may be any step within the maximum step count range. When Adjust mode command is issued, AL from previously set value must be applied. Off-Chip-Driver Adjust Program 4 bit burst code inputs to all DQs Operation DT0 DT1 DT2 DT3 Pull-up driver strength Pull-down driver strength 0 0 0 0 NOP (no operation) NOP (no operation) 0 0 0 1 Increase by 1 step NOP 0 0 1 0 Decrease by 1 step NOP 0 1 0 0 NOP Increase by 1 step 1 0 0 0 NOP Decrease by 1 step 0 1 0 1 Increase by 1 step Increase by 1 step 0 1 1 0 Decrease by 1 step Increase by 1 step 1 0 0 1 Increase by 1 step Decrease by 1 step 1 0 1 0 Decrease by 1 step Decrease by 1 step Other Combinations Reserved Reserved 28/29 |
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