SM8230A

SEIKO NPC CORPORATION —2

BLOCK DIAGRAM

PIN DESCRIPTION

Number

Name

I/O

Description

1

SD

I

Serial data input

2

SCL

I

Serial data transfer clock input.

(For valid transfer, OE must stay LOW for 16 clock cycles.)

3OE

I

DTMF output enable/serial data transfer select input.

Serial data transfer is selected when LOW.

4

VSS

–

Ground

5

CLK

I

System clock input. The clock can be set to one of four frequencies (480kHz,

960kHz, 1.92MHz, 3.84MHz).

6

BZL

O

DTMF low-frequency group analog output

7

BZH

O

DTMF high-frequency group analog output

8

VDD

–

Supply voltage

CLK

OE

BZL

VSS

SCL

VDD

SD

BZH

LATCH

SELECTOR

Programmable

Counter

High Group

ROM

D/A

Converter

Output

Control

Programmable

Counter

Low Group

ROM

D/A

Converter

Output

Control