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PI7C9X110 Datasheet(PDF) 21 Page - Pericom Semiconductor Corporation

Part # PI7C9X110
Description  PCI Express-to-PCI Reversible Bridge
PDF  145 Pages
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Manufacturer  PERICOM [Pericom Semiconductor Corporation]
Direct Link  http://www.pericom.com
Logo PERICOM - Pericom Semiconductor Corporation

PI7C9X110 Datasheet(HTML) 21 Page - Pericom Semiconductor Corporation

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PI7C9X110
PCIe-to-PCI Reversible Bridge
Page 21 of 145
Pericom Semiconductor
November 2007, Revision 2.4
If PI7C9X110 sees a logic LOW on PCIXCAP, one or more devices on the secondary have either pulled the signal
to ground (PCI-X 66MHz capable) or tied it to ground (only capable of conventional PCI mode). To differentiate
between the two conditions, PI7C9X110 then enables PCIXUP to put the strong pull-up into the circuit node. If
PCIXCAP remains at logic LOW, it must be tied to ground by one or more devices, and the bus is initialized to
conventional PCI mode. If PCIXUP can be pulled up, one or more devices are capable of only PCI-X 66MHz
operation so the bus is initialized to PCI-X 66MHz mode. If PI7C9X110 sees logic HIGH on PCIXCAP, then all
devices on the secondary bus are capable of PCI-X 100MHz or 133MHz operation. Since PI7C9X110 does not have
a pin to distinguish between the 100MHz or 133MHz clock frequencies, its logic is based on 133MHz. The
secondary bus is initialized to PCI-X 133MHz mode. However, 100MHz clock can still be used if all the devices on
the PCI-X bus are 100MHz capable and the clock input (pin CLKIN) is set at 100MHz frequency.
There is no pin for M66EN for the secondary interface of PI7C9X110 because the internal PLL is bypassed in
conventional PCI mode. CLKIN is used directly, eliminating the need to distinguish between conventional PCI
33MHz and 66MHz.
Figure 3-1 PCI / PCI-X Selection
3.3
PIN STRAPPING
If TM2 is strapped to high, PI7C9X110 uses TM1, TM0, and MSK_IN as strapping pins. The strapping functions
are listed in Table 3-2 to show the states of operations during the PCI Express PERST_L de-assertion transition in
forward bridge mode or PCI RESET_L de-assertion transition in reverse bridge mode.
Table 3-2 Pin Strapping
TM2 Strapped
TM1 Strapped
TM0 Strapped
MSK_IN Strapped
Test Functions
PI7C9X110
PCIXCAP
Enable During Bus Capability
Determination
3.3v
PCIXUP
3.3v
56K
Ohms
Weak
Pull-up
PCI-X 100MHz
or 133MHz Card
0.01uF
PCI Card
0.01uF
PCI-X 66MHz
Card
10K
Ohms
0.01uF
Strong
Pull-up
1K
Ohms



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