STW81103 datasheet(8/53 Pages) STMICROELECTRONICS

8 / 53 page

Block diagram and pin configuration

STW81103

8/53

ICP

PLL charge pump output

REXT

External resistance connection for PLL

charge pump

VDD_CP

Power supply for charge pump

TEST1

Test input 1

For test purposes only;

must be connected to

GND

LOCK_DET

Lock detector

CMOS output

(IOUT=4mA)

TEST2

Test input 2

For test purposes only;

must be connected to

GND

REF_CLK

Reference clock input

VDD_PLL

PLL digital power supply

EXTVCO_INN

External VCO negative input

For test purposes only;

must be connected to

GND

EXTVCO_INP

External VCO positive input

For test purposes only;

must be connected to

GND

VDD_BUFVCO

VCO buffer power supply

DBUS_SEL

Digital Bus Interface select

CMOS input

VDD_DBUS

SPI and I2C bus power supply

EXT_PD

Power down hardware

‘0’ device ON; ‘1’ device OFF

CMOS input

SDA/DATA

I2CBUS/SPI data line

CMOS Bidir Schmitt

triggered (IOUT=4mA)

SCL/CLK

I2CBUS/SPI clock line

CMOS input Schmitt

triggered

ADD0/LOAD

I2CBUS address select pin/ SPI load line

CMOS input

ADD1

I2CBUS address select pin

CMOS input; must be

connected to GND in SPI

mode

ADD2

I2CBUS address select pin

CMOS input; must be

connected to GND in SPI

mode

Table 1.

Pin description (continued)

Pin No

Name

Description

Observation

STW81103 Datasheet(PDF) 8 Page - STMicroelectronics

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