 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
ST72361 Datasheet(PDF) 165 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST72361 Datasheet(HTML) 165 Page - STMicroelectronics |
|
|
165 / 224 page  ST72361 165/224 LINSCI ™ SERIAL COMMUNICATION INTERFACE (LIN Master Only) (Cont’d) DATA REGISTER (SCIDR) Read/Write Reset Value: Undefined Contains the Received or Transmitted data char- acter, depending on whether it is read from or writ- ten to. The Data register performs a double function (read and write) since it is composed of two registers, one for transmission (TDR) and one for reception (RDR). The TDR register provides the parallel interface between the internal bus and the output shift reg- ister (see Figure 88 on page 153). The RDR register provides the parallel interface between the input shift register and the internal bus (see Figure 88). BAUD RATE REGISTER (SCIBRR) Read/Write Reset Value: 0000 0000 (00h) Bits 7:6 = SCP[1:0] First SCI Prescaler These 2 prescaling bits allow several standard clock division ranges: Bits 5:3 = SCT[2:0] SCI Transmitter rate divisor These 3 bits, in conjunction with the SCP1 and SCP0 bits define the total division applied to the bus clock to yield the transmit rate clock in conven- tional Baud Rate Generator mode. Note: This TR factor is used only when the ETPR fine tuning factor is equal to 00h; otherwise, TR is replaced by the (TR*ETPR) dividing factor. Bits 2:0 = SCR[2:0] SCI Receiver rate divisor. These 3 bits, in conjunction with the SCP1 and SCP0 bits define the total division applied to the bus clock to yield the receive rate clock in conven- tional Baud Rate Generator mode. Note: This RR factor is used only when the ERPR fine tuning factor is equal to 00h; otherwise, RR is replaced by the (RR*ERPR) dividing factor. 7 0 DR7 DR6 DR5 DR4 DR3 DR2 DR1 DR0 7 0 SCP1 SCP0 SCT2 SCT1 SCT0 SCR2 SCR1 SCR0 PR Prescaling factor SCP1 SCP0 1 0 0 3 1 4 1 0 13 1 TR dividing factor SCT2 SCT1 SCT0 1 0 0 0 2 1 4 1 0 8 1 16 1 0 0 32 1 64 1 0 128 1 RR dividing factor SCR2 SCR1 SCR0 1 0 0 0 2 1 4 1 0 8 1 16 1 0 0 32 1 64 1 0 128 1 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
New Zealand ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
