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ST72361 Datasheet(PDF) 170 Page - STMicroelectronics

Part # ST72361
Description  8-bit MCU with Flash or ROM, 10-bit ADC, 5 timers, SPI, 2x LINSCI?
PDF  224 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72361 Datasheet(HTML) 170 Page - STMicroelectronics

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10-BIT A/D CONVERTER (ADC) (Cont’d)
10.9.6 Register Description
CONTROL/STATUS REGISTER (ADCCSR)
Read/Write (Except bit 7 read only)
Reset Value: 0000 0000 (00h)
Bit 7 = EOC End of Conversion
This bit is set by hardware. It is cleared by soft-
ware reading the ADCDRH register or writing to
any bit of the ADCCSR register.
0: Conversion is not complete
1: Conversion complete
Bit 6 = SPEED A/D clock selection
This bit is set and cleared by software.
Table 29. A/D Clock Selection
Bit 5 = ADON A/D Converter on
This bit is set and cleared by software.
0: Disable ADC and stop conversion
1: Enable ADC and start conversion
Bit 4 = SLOW A/D Clock Selection
This bit is set and cleared by software. It works to-
gether with the SPEED bit. Refer to Table 29.
Bits 3:0 = CH[3:0] Channel Selection
These bits are set and cleared by software. They
select the analog input to convert.
*The number of channels is device dependent. Refer to
the device pinout description.
DATA REGISTER (ADCDRH)
Read Only
Reset Value: 0000 0000 (00h)
Bits 7:0 = D[9:2] MSB of Analog Converted Value
DATA REGISTER (ADCDRL)
Read Only
Reset Value: 0000 0000 (00h)
Bits 7:2 = Reserved. Forced by hardware to 0.
Bits 1:0 = D[1:0] LSB of Analog Converted Value
7
0
EOC
SPEED ADON SLOW
CH3
CH2
CH1
CH0
fADC
SLOW
SPEED
fCPU/2
0
0
fCPU (where fCPU <= 4 MHz)
0
1
fCPU/4
1
0
fCPU/2 (same frequency as
SLOW=0, SPEED=0)
1
1
Channel Pin*
CH3
CH2
CH1
CH0
AIN0
0
0
0
0
AIN1
0
0
0
1
AIN2
0
0
1
0
AIN3
0
0
1
1
AIN4
0
1
0
0
AIN5
0
1
0
1
AIN6
0
1
1
0
AIN7
0
1
1
1
AIN8
1
0
0
0
AIN9
1
0
0
1
AIN10
1
0
1
0
AIN11
1
0
1
1
AIN12
1
1
0
0
AIN13
1
1
0
1
AIN14
1
1
1
0
AIN15
1
1
1
1
7
0
D9
D8
D7
D6
D5
D4
D3
D2
7
0
0
0
0
0
0
0
D1
D0



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