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ES9039Q2M Datasheet(PDF) 67 Page - ESS Technology,Inc |
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ES9039Q2M Datasheet(HTML) 67 Page - ESS Technology,Inc |
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67 / 107 page ![]() VERSION 0.2.2 67 ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 • WWW.ESSTECH.COM ES9039Q2M Product Datasheet Register 33-30: RESERVED Register 34: DATA PATH CONFIG Bits [7] [6] [5:0] Default 1'b0 1'b0 6'b000000 Bits Mnemonic Description [7] MONO_MODE Enables MONO Mode Note: Does not turn off unused data path for power saving [6] CAL_RES_ENB Selects the calibration resistor connection on GPIO8. • 1'b0: DAC calibration resistor enabled (default) • 1'b1: DAC calibration resistor disabled, normal GPIO [5:0] RESERVED N/A Register 35: PCM 4X GAIN Bits [7:2] [1] [0] Default 6'd0 1'b0 1'b0 Bits Mnemonic Description [7:2] RESERVED N/A [1] CH2_PCM_4X_GAIN Changes the gain on the CH2 interpolation path after the IIR. • 1'b0: 1x gain • 1'b1: 4x gain Note: Not available in DSD mode. [0] CH1_PCM_4X_GAIN Changes the gain on the CH1 interpolation path after the IIR. • 1'b0: 1x gain • 1'b1: 4x gain Note: Not available in DSD mode. Register 36: RESERVED |
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