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M68AW064FZB Datasheet(PDF) 3 Page - STMicroelectronics |
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M68AW064FZB Datasheet(HTML) 3 Page - STMicroelectronics |
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3 / 18 page ![]() 3/18 M68AW064F SUMMARY DESCRIPTION The M68AW064F is a 1 Mbit (1,048,576 bit) CMOS SRAM, organized as 65,536 words by 16 bits. The device features fully static operation re- quiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 2.7 to 3.6V supply. This device has an au- tomatic power-down feature, reducing the power consumption by over 99% when deselected. The M68AW064F is available in TFBGA48 (0.75 mm pitch) package. Figure 2. Logic Diagram Table 1. Signal Names AI04872b 16 A0-A15 W DQ0-DQ15 VCC M68AW064F G 16 E UB LB VSS A0-A15 Address Inputs DQ0-DQ15 Data Input/Output E Chip Enable G Output Enable W Write Enable UB Upper Byte Enable Input LB Lower Byte Enable Input VCC Supply Voltage VSS Ground NC Not Connected Internally |
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