AS7038RB datasheet(70/127 Pages) AMSOSRAM

70 / 127 page

Document Feedback

AS7038RB

Functional Description

Datasheet

• PUBLIC

DS000726

• v2-00 • 2021-Jun-02

126

│ 69

OFE2_CFGA (Address 0x58)

Figure 83:

OFE2_CFGA Register

Addr: 0x58

OFE2_CFGA

Bit

Bit Name

Default

Access

Bit Description

ofe2_sd_pol_init

The low level driver shall ensure that this register

is 0 if one of the seq_sdm pulses is first, and is 1

if the seq_sdp is first within a sequence.

ofe2_sd_en

0: Power down of the Synchronous demodulator

1: Enable Synchronous demodulator

ofe2_hp_en

0: Power down of the high pass filter

1: Enable high pass filter

ofe2_gain_en

0: Power down of the Gain stage

1: Enable Gain stage

ofe2_sd_byp

0: Synchronous demodulator is used

1: Synchronous demodulator is bypassed

ofe2_hp_byp

0: HP filter is used

1: HP filter is bypassed

ofe2_gain_byp

0: Gain stage is used

1: Gain stage is bypassed

ofe2_sd_hld

SD hold

0: Output of synchronous demodulator is forced

to SIGREF if not set to +1 or -1

1: Output of synchronous demodulator is

tristated if not set to +1 or -1

OFE2_CFGB (Address 0x59)

Figure 84:

OFE2_CFGB Register

Addr: 0x59

OFE2_CFGB

Bit

Bit Name

Default

Access

Bit Description

7:5

ofe2_gain_g

Gain for synchronous demodulator 2.

Setting

Gain

AS7038RB Datasheet(PDF) 70 Page - ams-OSRAM AG

AS7038RB Datasheet(HTML) 70 Page - ams-OSRAM AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL