RZSLASHG2UL datasheet(32/67 Pages) RENESAS

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RZ/G2UL Group

3. Electrical Characteristics

R01DS0486EJ0110 Rev.1.10

Page 32 of 67

Jun 16, 2025

3.5.3.3

eMMC host interface timing (HS200)

Table 3.26

eMMC Host Interface Timing (HS200 1.8-V Power Supply Operation, Output Load 15 pF)

Item

Symbol

Min.

Max.

Unit

Figures

SD0_CLK clock cycle

tMMCPP

7.50

15.0

Figure 3.10

SD0_CLK clock high level width

tMMCWH

3.20

—

SD0_CLK clock low level width

tMMCWL

3.20

—

SD0_CLK clock rise time

tMMCLH

—

1.22

SD0_CLK clock fall time

tMMCHL

—

1.22

SD0_CMD/SDDAT output delay

tMMCODLY

−1.50

1.75

SD0_CMD/SDDAT input set up time

tMMCISU

—

SD0_CMD/SDDAT input hold time

tMMCIH

—

SD0_CMD/SDDAT input data width

tMMCIDW

4.31

—

tMMCPP

tMMCWL

tMMCWH

tMMCLH

tMMCHL

tMMCISU tMMCIH

tMMCIDW

tMMCODLY(max)

tMMCODLY(min)

SD_CLK

(output)

SD_CMD, SD_D7 to SD_D0

(input)

SD_CMD, SD_D7 to SD_D0

(output)

Figure 3.10

eMMC Host Interface (MMC Interface HS200 Mode 1.8-V Power Supply Selection)

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