- 3 -

Rev. A

EVAL-AD9835EB

SOCKETS

There are six sockets relevant to the operation of the AD9835

on this evaluation board.

The function of these sockets is

outlined in Table 3.

Table 3.

Socket Functions

Socket

Function

REFIN

Sub-Miniature BNC Socket for REFIN.

IOUT

Sub-Miniature BNC Socket for IOUT.

MCLK

Sub-Miniature BNC Socket for the MCLK

input.

FSEL

Sub-Miniature BNC Socket for FSELECT.

PSEL0

Sub-Miniature BNC Socket for PSEL0.

PSEL1

Sub-Miniature BNC Socket for PSEL1.

CONNECTORS

There are three connectors on the AD9835 evaluation board

as outlined in Table 4.

Table 4.

Connector Functions

Connector

Functions

J 1

36-Way Centronics Connector.

J 2

PCB Mounting Terminal Block.

The Digital

Power Supply to the Evaluation Board is

provided via this Connector.

J 3

PCB Mounting Terminal Block.

The Analog

Power Supply to the Evaluation Board is

provided via this Connector.

SWITCHES

There is one switch on the AD9835 evaluation board.

This

switch is a double throw, end stackable switch.

This switch

can be used to control the FSELECT, PSEL0 and PSEL1

inputs.

EVALUATION BOARD INTERFACING

Interfacing to the evaluation board is via a 36-way

centronics female connector, J1.

The pinout for the J1

connector is shown in Figure 2 and its pin designations are

given in Table 2.

Figure 2: Pin Configuration for 36-Way Connector, J1.

36-Way Connector Pin Description

DGND

Digital Ground.

These lines are connected to

the digital ground plane on the evaluation

board.

SDATA

Serial Data. Data applied to this pin is buffered

before being applied to the AD9835. The serial

data applied to the SDATA pin is written to the

serial register of the device.

The data is then

transferred to the destination register, the control

register or the FSELECT/PSEL registers, the

control bits being used to identify the destination

for the data information. The AD9835 accepts

CMOS logic levels.

SCLK

Serial Clock. The signal on this pin is buffered

before being applied to the SCLK pin of the

AD9835.

The AD9835 requires an external

serial clock when data/control information is

being written to the device.

The serial clock

can be continuous or, it can idle high or low

between write operations.

FSYNC

The signal on this pin is buffered before being

applied to the FSYNC pin of the AD9835. The

FSYNC signal frames the 16-bit word being

loaded into the AD9835, the signal going low

for 16 SCLK cycles.

Table 2.

36-Way Connector Pin Funtions

PIN NO.

MNEMONIC

2SCLK

3

SDATA

4

FSYNC

19-30

DGND

Note: The remainder of the pins on the 36-way connector are

no connects.

1

19

18

36