Data Sheet

ADG936/ADG936-R

Rev. B | Page 9 of 16

TEST CIRCUITS

Similar setup for the ADG936. Additional pins omitted for clarity.

tON

50%

50%

90%

10%

VINx

VOUT

tOFF

10

F

VS

INx

RFx

RFCx

RL

50



VOUT

GND

VDD

VDD

Figure 19. Switch Timing: tON, tOFF

VINx

VOUT

50%

50%

90%

90%

10%

10%

tFALL

tRISE

VDD

VDD

10

F

VS

INx

RFx

RFCx

GND

RL

50



VOUT

Figure 20. Switch Timing: tRISE, tFALL

VS

NETWORK

ANALYZER

VINx

OFF ISOLATION = 20log

VOUT

VS

VDD

10

F

VDD

50



VOUT

RL

50



ADG936-R

RF2x

RF1x

INx

RFC

GND

50



Figure 21. Off Isolation

VS

NETWORK

ANALYZER

VINx

INSERTION LOSS = 20log

VOUT

VS

VDD

10

F

VDD

50



VOUT

RL

50



ADG936-R

RF2x

RF1x

INx

RFCx

GND

50



Figure 22. Insertion Loss

VS

NETWORK

ANALYZER

VINx

CROSSTALK = 20log

VOUT

VS

VDD

10

F

VDD

50



VOUT

RL

50



ADG936-R

RF2x

RF1x

INx

RFCx

GND

50



Figure 23. Crosstalk

VINx

VDD

10

F

VDD

ADG936-R

RF2x

RF1x

INx

RFCx

NC

NC

OSCILLOSCOPE

GND

Figure 24. Video Feedthrough