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74HCT573PW Datasheet(PDF) 12 Page - Nexperia B.V. All rights reserved |
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74HCT573PW Datasheet(HTML) 12 Page - Nexperia B.V. All rights reserved |
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12 / 20 page ![]() 74HC_HCT573 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 7 — 4 March 2016 12 of 20 NXP Semiconductors 74HC573; 74HCT573 Octal D-type transparent latch; 3-state Test data is given in Table 9. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch. Fig 11. Test circuit for measuring switching times Table 9. Test data Type Input Load S1 position VI tr, tf CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ 74HC573 VCC 6ns 15pF, 50 pF 1k open GND VCC 74HCT573 3 V 6 ns 15 pF, 50 pF 1 k open GND VCC |
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