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NRF52811-QCAA-R Datasheet(PDF) 55 Page - Nordic Semiconductor |
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NRF52811-QCAA-R Datasheet(HTML) 55 Page - Nordic Semiconductor |
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55 / 444 page  Power and clock management Register Offset Description RAM[6].POWER 0x960 RAM6 power control register. The RAM size will vary depending on product variant, and the RAM6 register will only be present if the corresponding RAM AHB slave is present on the device. RAM[6].POWERSET 0x964 RAM6 power control set register RAM[6].POWERCLR 0x968 RAM6 power control clear register RAM[7].POWER 0x970 RAM7 power control register. The RAM size will vary depending on product variant, and the RAM7 register will only be present if the corresponding RAM AHB slave is present on the device. RAM[7].POWERSET 0x974 RAM7 power control set register RAM[7].POWERCLR 0x978 RAM7 power control clear register Table 16: Register overview 5.3.9.1 TASKS_CONSTLAT Address offset: 0x078 Enable Constant Latency mode Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID A Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID Access Field Value ID Value Description A W TASKS_CONSTLAT Enable Constant Latency mode Trigger 1 Trigger task 5.3.9.2 TASKS_LOWPWR Address offset: 0x07C Enable Low-power mode (variable latency) Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID A Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID Access Field Value ID Value Description A W TASKS_LOWPWR Enable Low-power mode (variable latency) Trigger 1 Trigger task 5.3.9.3 EVENTS_POFWARN Address offset: 0x108 Power failure warning Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID A Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID Access Field Value ID Value Description A RW EVENTS_POFWARN Power failure warning NotGenerated 0 Event not generated Generated 1 Event generated 4454_140 v1.0 55 |
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