LTC3621 datasheet(8/20 Pages) AD

8 / 20 page

LTC3621/LTC3621-2

Rev. D

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PIN FUNCTIONS (DFN/MSOP)

SW (Pin 1/Pin 1): Switch Node Connection to the Inductor

of the Step-Down Regulator.

VIN(Pin2/Pin2):InputVoltageoftheStep-DownRegulator.

RUN (Pin 3/Pin 3): Logic Controlled RUN Input. Do not

leave this pin floating. Logic high activates the step-down

regulator.

FB (Pin 4/Pin 5): Feedback Input to the Error Amplifier

of the Step-Down Regulator. Connect a resistor divider

tap to this pin. The output voltage can be adjusted from

0.6V to VIN by:

VOUT = 0.6V • [1 + (R2/R1)]

ForFixedVOUToptions,connecttheFBpindirectlytoVOUT.

PGOOD (Pin 4, MSOP Package Only): VOUT within Regu-

lation Indicator.

INTVCC(Pin5/Pin6):LowDropoutRegulator.Bypasswith

at least 1µF to Ground.

MODE/SYNC(Pin6/Pin7):BurstModeSelectandExternal

Clock Synchronization of the Step-Down Regulator. Tie

MODE/SYNC to INTVCC for Burst Mode operation with a

400mA peak current clamp, tie MODE/SYNC to GND for

pulse skipping operation, and tie MODE/SYNC to a volt-

age between 1V and VINTVCC – 1.2V for forced continuous

mode.Furthermore,connectingMODE/SYNCtoanexternal

clock will sync the system clock to the external clock and

put the part in forced continuous mode.

GND (Exposed Pad Pin 7/Pin 9): Ground Backplane for

PowerandSignalGround.MustbesolderedtoPCBground.

SGND (Pin 8, MSOP Package Only): Signal Ground.

LTC3621 Datasheet(PDF) 8 Page - Analog Devices