STM8S103XX datasheet(19/56 Pages) STMICROELECTRONICS

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STM8S103xx, STM8S105xx

Product overview

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LIN slave

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Autonomous header handling - one single interrupt per valid message header

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Automatic baud rate synchronization - maximum tolerated initial clock deviation ±15 %

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Synch delimiter checking

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11-bit LIN synch break detection - break detection always active

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Parity check on the LIN identifier field

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LIN error management

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Hot plugging support

Asynchronous communication (UART mode)

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Full duplex, asynchronous communications - NRZ standard format (mark/space)

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Independently programmable transmit and receive baud rates up to 500 Kbit/s

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Programmable data word length (8 or 9 bits)

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Low-power standby mode - 2 receiver wake-up modes:

–

Address bit (MSB)

–

Idle line

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Muting function for multiprocessor configurations

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Overrun, noise and frame error detection

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6 interrupt sources

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Tx, Rx parity control

Note:

In STM8S105, the LINUART also supports IrDA mode, Smartcard mode and synchronous

communication (SPI master mode).

4.14.3

SPI

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Maximum speed: 8 Mbit/s (fMASTER/2) both for master and slave

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Full duplex synchronous transfers

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Simplex synchronous transfers on 2 lines with a possible bidirectional data line

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Master or slave operation - selectable by hardware or software

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CRC calculation

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1 byte Tx and Rx buffer

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Slave/master selection input pin

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