ST20-GP1 datasheet(102/116 Pages) STMICROELECTRONICS

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ST20-GP1

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19 Timing speciﬁcations

19.1 EMI timings

The timings are based on a 50 pF load, and are taken at a threshold of 1.5 V.

Table 19.1 EMI cycle timings

Note: The ‘Reference clock’ used in the EMI timings is a virtual clock and is deﬁned as the point at

which all data and address outputs are valid. This is designed to remove process dependent skews

from the datasheet description and highlight the dominant inﬂuence of address and data timings on

memory system design.

Symbol Parameter

Min

Max

Units Notes

tCHAV

Reference clock high to Address valid

-9.0

0.0

tCLSV

Reference clock low to Strobe valid

-11.0

3.0

tCHSV

Reference clock high to Strobe valid

-9.0

0.0

tRDVCH

Read Data valid to Reference clock high

32.0

tCHRDX

Read Data hold after Reference clock high

-9.0

tCHWDV

Reference clock high to Write Data valid

-9.0

2.0

tWVCH

MemWait valid to Reference clock high

27.0

tCHWX

MemWait hold after Reference clock high

-6.0

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