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STD25NF10 Datasheet(PDF) 1 Page - STMicroelectronics |
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STD25NF10 Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 9 page ![]() 1/9 May 2002 STD25NF10 N-CHANNEL 100V - 0.033 Ω - 25A DPAK LOW GATE CHARGE STripFET™ POWER MOSFET (1) ISD ≤35A, di/dt ≤300A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX. (2) Starting Tj = 25°C, ID = 12.5A, VDD = 50V s TYPICAL RDS(on) = 0.033Ω s EXCEPTIONAL dv/dt CAPABILITY s 100% AVALANCHE TESTED s APPLICATION ORIENTED CHARACTERIZATION DESCRIPTION This Power Mosfet series realized with STMicro- electronics unique STripFET process has specifical- ly been designed to minimize input capacitance and gate charge. It is therefore suitable as primary switch in advanced high-efficiency isolated DC-DC converters for Telecom and Computer application. It is also intended for any application with low gate charge drive requirements. APPLICATIONS s HIGH-EFFICIENCY DC-DC CONVERTERS s UPS AND MOTOR CONTROL ABSOLUTE MAXIMUM RATINGS (q) Pulse width limited by safe operating area (*) Current Limited by Package TYPE VDSS RDS(on) ID STD25NF10 100 V < 0.038 Ω 25 A Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) 100 V VDGR Drain-gate Voltage (RGS = 20 kΩ) 100 V VGS Gate- source Voltage ± 20 V ID (*) Drain Current (continuos) at TC = 25°C 25 A ID Drain Current (continuos) at TC = 100°C 21 A IDM (l) Drain Current (pulsed) 100 A PTOT Total Dissipation at TC = 25°C 100 W Derating Factor 0.67 W/°C dv/dt (1) Peak Diode Recovery voltage slope 13 V/ns EAS (2) Single Pulse Avalanche Energy 480 mJ Tstg Storage Temperature –55 to 175 °C Tj Operating Junction Temperature DPAK 1 3 INTERNAL SCHEMATIC DIAGRAM |
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