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STD2NB50 Datasheet(PDF) 1 Page - STMicroelectronics |
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STD2NB50 Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 10 page ![]() 1/10 September 2001 STD2NB50 STD2NB50-1 N-CHANNEL 500V - 5 Ω - 1A DPAK / IPAK PowerMesh™ MOSFET s TYPICAL RDS(on) = 5 Ω s 100% AVALANCHE TESTED s VERY LOW INTRINSIC CAPACITANCES s ADD SUFFIX “T4” FOR ORDERING IN TAPE & REEL DESCRIPTION Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an ad- vanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprieraty edge termi- nation structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteris- tics. APPLICATIONS s SWITH MODE POWER SUPPLIES (SMPS) s LIGHTING FOR INDUSTRIAL AND CONSUMER ENVIRONMENT ABSOLUTE MAXIMUM RATINGS (•)Pulse width limited by safe operating area TYPE VDSS RDS(on) ID STD2NB50 STD2NB50-1 500V 500V < 6 Ω < 6 Ω 1 A 1 A Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) 500 V VDGR Drain-gate Voltage (RGS = 20 kΩ) 500 V VGS Gate- source Voltage ± 30 V ID Drain Current (continuos) at TC = 25°C 1A ID Drain Current (continuos) at TC = 100°C 0.63 A IDM (q) Drain Current (pulsed) 4 A PTOT Total Dissipation at TC = 25°C 40 W Derating Factor 0.32 W/°C dv/dt(1) Peak Diode Recovery voltage slope 3.5 V/ns Tstg Storage Temperature –65 to 150 °C Tj Max. Operating Junction Temperature 150 °C (1)ISD ≤1A, di/dt ≤200A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX. 3 2 1 1 3 DPAK IPAK INTERNAL SCHEMATIC DIAGRAM |
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