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ADE7569 Datasheet(PDF) 6 Page - Analog Devices |
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ADE7569 Datasheet(HTML) 6 Page - Analog Devices |
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6 / 136 page  ADE7566/ADE7569 Preliminary Technical Data Rev. PrA | Page 6 of 136 Parameter Min Typ Max Unit Test Conditions/Comments POWER-ON RESET (POR) VDD POR Detection Threshold 1.6 2.9 V POR Active Timeout Period TBD ms Strobe Period in Battery Operation TBD ms VSWOUT POR Detection Threshold 1.8 2.2 V POR Active Timeout Period TBD ms VINTD POR Detection Threshold 2.25 2.4 V POR Active Timeout Period TBD ms VINTA POR Detection Threshold 2.25 2.4 V POR Active Timeout Period TBD ms BATTERY SWITCH OVER Voltage Operating Range (VSWOUT) 2.4 3.7 V VDD to VBAT Switching Switching Threshold (VDD) 2.75 TBD V Switching Delay 10 ns When VDD to VBAT switch activated by VDD Switching Delay 30 ms When VDD to VBAT switch activated by VDCIN VBAT to VDD Switching Switching Threshold (VDD) 2.75 TBD V Switching Delay 130 ms Based on VDD > 2.75V VSWOUT To VBAT Leakage Current 1 nA LCD, CHARGE PUMP ACTIVE Charge Pump Capacitance Between LCDVP1 and LCDVP2 100 nF LCDVA, LCDVB, LCDVC Decoupling Capacitance 470 nF LCDVA 0 1.7 V LCDVB 0 4.0 V 1/2 bias modes LCDVB 0 3.4 V 1/3 bias modes LCDVC 0 5.1 V 1/3 bias mode LCD Stand-By Current 100 nA 1/2 and 1/3 bias modes V1 Segment Line Voltage LCDVA − 0.1 LCDVA V Current on segment line = −2 μA V2 Segment Line Voltage LCDVB − 0.1 LCDVB V Current on segment line = −2 μA V3 Segment Line Voltage LCDVC − 0.1 LCDVC V Current on segment line = −2 μA DC Voltage Across Segment and COM Pin 50 mV LCDVC − LCDVB, LCDVC − LCDVA, or LCDVB − LCDVA LCD, RESISTOR LADDER ACTIVE Leakage Current ±20 nA 1/2 and 1/3 bias modes, no load V1 Segment Line Voltage LCDVA − 0.1 LCDVA V Current on segment line = −2 μA V2 Segment Line Voltage LCDVB − 0.1 LCDVB V Current on segment line = −2 μA V3 Segment Line Voltage LCDVC − 0.1 LCDVC V Current on segment line = −2 μA ON-CHIP REFERENCE Reference Error ±0.9 mV Power Supply Rejection 80 dB Temperature Coefficient1 35 50 ppm/°C |
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