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T80C5112-RKSCV Datasheet(PDF) 29 Page - ATMEL Corporation |
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T80C5112-RKSCV Datasheet(HTML) 29 Page - ATMEL Corporation |
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29 / 97 page  Rev. B - November 10, 2000 29 Preliminary T80C5112 Table 17. AUXR1: Auxiliary Register 1 User software should not write 1s to reserved bits. These bits may be used in future 8051 family products to invoke new feature. In that case, the reset value of the new bit will be 0, and its active value will be 1. The value read from a reserved bit is indeterminate. Application Software can take advantage of the additional data pointers to both increase speed and reduce code size, for example, block operations (copy, compare, search ...) are well served by using one data pointer as a ÕsourceÕ pointer and the other one as a "destination" pointer. 7 6 5 4 3 2 1 0 - - - - - - - DPS Bit Number Bit Mnemonic Description 7 - Reserved The value read from this bit is indeterminate. Do not set this bit. 6 - Reserved The value read from this bit is indeterminate. Do not set this bit. 5 - Reserved The value read from this bit is indeterminate. Do not set this bit. 4 - Reserved The value read from this bit is indeterminate. Do not set this bit. 3 - Reserved The value read from this bit is indeterminate. Do not set this bit. 2 - Reserved The value read from this bit is indeterminate. Do not set this bit. 1 - Reserved The value read from this bit is indeterminate. Do not set this bit. 0 DPS Data Pointer Selection Clear to select DPTR0. Set to select DPTR1. |
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