JS48F4400P0VB00 datasheet(56/99 Pages) NUMONYX

56 / 99 page

P30

Datasheet

November 2007

Order Number: 306666-11

11.0

Programming Operations

The device supports three programming methods: Word Programming (40h/10h),

Buffered Programming (E8h, D0h), and Buffered Enhanced Factory Programming (80h,

D0h). See

Section 9.0, “Device Operations” on page 43 for details on the various programming

commands issued to the device. The following sections describe device programming in

detail.

Successful programming requires the addressed block to be unlocked. If the block is

locked down, WP# must be deasserted and the block must be unlocked before

attempting to program the block. Attempting to program a locked block causes a

program error (SR[4] and SR[1] set) and termination of the operation. See Section

13.0, “Security Modes” on page 64 for details on locking and unlocking blocks.

The Product Name is segmented into multiple 8-Mbit Programming Regions. See

Section 4.4, “Memory Maps” on page 22 for complete addressing. Execute in Place

(XIP) applications must partition the memory such that code and data are in separate

programming regions. XIP is executing code directly from flash memory. Each

Programming Region should contain only code or data but not both. The following

terms define the difference between code and data. System designs must use these

definitions when partitioning their code and data for the P30 device.

• Code: Execution code ran out of the flash device on a continuous basis in the

system.

• Data: Information periodically programmed into the flash device and read back

(e.g. execution code shadowed and executed in RAM, pictures, log files, etc.).

11.1

Word Programming

Word programming operations are initiated by writing the Word Program Setup

command to the device (see Section 9.0, “Device Operations” on page 43). This is

followed by a second write to the device with the address and data to be programmed.

The device outputs Status Register data when read. See Figure 38, “Word Program

Flowchart” on page 79. VPP must be above VPPLK, and within the specified VPPL min/

max values.

During programming, the Write State Machine (WSM) executes a sequence of

internally-timed events that program the desired data bits at the addressed location,

and verifies that the bits are sufficiently programmed. Programming the flash memory

array changes “ones” to “zeros”. Memory array bits that are zeros can be changed to

ones only by erasing the block (see Section 12.0, “Erase Operations” on page 62).

The Status Register can be examined for programming progress and errors by reading

at any address. The device remains in the Read Status Register state until another

command is written to the device.

Status Register bit SR[7] indicates the programming status while the sequence

executes. Commands that can be issued to the device during programming are

Program Suspend, Read Status Register, Read Device Identifier, CFI Query, and Read

Array (this returns unknown data).

When programming has finished, Status Register bit SR[4] (when set) indicates a

programming failure. If SR[3] is set, the WSM could not perform the word

programming operation because VPP was outside of its acceptable limits. If SR[1] is set,

the word programming operation attempted to program a locked block, causing the

operation to abort.

JS48F4400P0VB00 Datasheet(PDF) 56 Page - Numonyx B.V

JS48F4400P0VB00 Datasheet(HTML) 56 Page - Numonyx B.V

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99

Datasheet Download

Link URL