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M48Z2M1V Datasheet(PDF) 4 Page - STMicroelectronics |
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M48Z2M1V Datasheet(HTML) 4 Page - STMicroelectronics |
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4 / 17 page ![]() M48Z2M1Y, M48Z2M1V 4/17 SUMMARY DESCRIPTION The M48Z2M1Y/V ZEROPOWER® RAM is a non- volatile 16,777,216-bit, Static RAM organized as 2,097,152 words by 8 bits. The device combines two internal lithium batteries, CMOS SRAMs and a control circuit in a plastic 36-pin DIP, long Module. The ZEROPOWER RAM replaces industry stan- dard SRAMs. It provides the nonvolatility of PROMs without any requirement for special WRITE timing or limitations on the number of WRITEs that can be performed. Figure 2. Logic Diagram Table 1. Signal Names Figure 3. DIP Connections AI02048 21 A0-A20 W DQ0-DQ7 VCC M48Z2M1Y M48Z2M1V G VSS 8 E A0-A20 Address Inputs DQ0-DQ7 Data Inputs / Outputs E Chip Enable G Output Enable W WRITE Enable VCC Supply Voltage VSS Ground NC Not Connected Internally VSS VCC AI02049 M48Z2M1Y M48Z2M1V 10 1 2 5 6 7 8 9 11 12 13 16 17 18 30 29 26 25 24 23 22 21 20 19 3 4 28 27 32 31 14 15 34 33 36 35 A1 A0 DQ0 A7 A4 A3 A2 A6 A5 A13 A10 A8 A9 DQ7 A15 A11 G E DQ5 DQ1 DQ2 DQ3 DQ4 DQ6 A16 A18 A12 A14 W A17 A20 NC NC A19 |
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