M48Z129Y datasheet(5/16 Pages) STMICROELECTRONICS

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M48Z129Y*, M48Z129V

Figure 4. Block Diagram

OPERATION MODES

The M48Z129Y/V also has its own Power-Fail De-

tect circuit. This control circuitry constantly moni-

tors the supply voltage for an out of tolerance

condition. When VCC is out of tolerance, the circuit

write protects the SRAM, providing data security in

the midst of unpredictable system operation. As

VCC falls, the control circuitry automatically switch-

es to the battery, maintaining data until valid power

is restored.

Table 2. Operating Modes

Note: X = VIH or VIL; VSO = Battery Back-up Switchover Voltage.

1. See Table 10., page 12 for details.

AI03608

RST

VSS

VOLTAGE SENSE

AND

SWITCHING

CIRCUITRY

131,072 x 8

SRAM ARRAY

A0-A16

DQ0-DQ7

POWER

VCC

INTERNAL

BATTERY

Mode

VCC

DQ0-DQ7

Power

Deselect

4.5 to 5.5V

3.0to 3.6V

VIH

High Z

Standby

WRITE

VIL

DIN

Active

READ

VIL

VIH

DOUT

Active

READ

VIL

VIH

High Z

Active

Deselect

VSO to VPFD (min)

(1)

High Z

CMOS Standby

Deselect

≤ VSO(1)

High Z

Battery Back-up Mode

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