| Electronic Components Datasheet Search |
|
ST7LITE1XB Datasheet(PDF) 114 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST7LITE1XB Datasheet(HTML) 114 Page - STMicroelectronics |
|
114 / 159 page ![]() ST7LITE1xB 114/159 13.3.4 Auxiliary Voltage Detector (AVD) Thresholds TA = -40 to 125°C, unless otherwise specified 13.3.5 Internal RC Oscillator and PLL The ST7 internal clock can be supplied by an internal RC oscillator and PLL (selectable by option byte). Symbol Parameter Conditions Typ Unit VIT+(AVD) 1=>0 AVDF flag toggle threshold (VDD rise) High Threshold Med. Threshold Low Threshold 4.50 4.00 3.35 V VIT-(AVD) 0=>1 AVDF flag toggle threshold (VDD fall) High Threshold Med. Threshold Low Threshold 4.40 3.85 3.20 Vhys AVD voltage threshold hysteresis VIT+(AVD)-VIT-(AVD) 170 mV ΔV IT- Voltage drop between AVD flag set and LVD reset activation VDD fall 0.15 V Symbol Parameter Conditions Min Typ Max Unit VDD(RC) Internal RC Oscillator operating voltage Refer to operating range of VDD with TA, section 13.3.1 on page 112 2.7 5.5 V VDD(x4PLL) x4 PLL operating voltage 2.7 3.7 VDD(x8PLL) x8 PLL operating voltage 3.3 5.5 tSTARTUP PLL Startup time 60 PLL input clock (fPLL) cycles |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |