STI5517 datasheet(2/3 Pages) STMICROELECTRONICS

2 / 3 page

STI5517

2/3

FEATURES

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180 MHz 32-bit ST20 CPU

– 8 Kbytes internal SRAM, 8 Kbytes of I-cache

and 8 Kbytes of D-cache

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Integrated transport demultiplexer

– DES, DVB and ICAM descramblers

– Support for more than 48 PID slots

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MPEG-2 MP@ML video decoder

– Fully programmable horizontal and vertical

SRCs

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Audio features

– MPEG-1 layers I/II decoding (MP3 option)

–Dolby Digital 5.1 down-mixed to 2 channels

–DolbyPro Logic compatible

–SRS TruSurround virtual surround sound

– PCM audio input

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Integrated audio DACs

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Graphics/display

– 5 display planes (background, video, still,

OSD and cursor)

– 2, 4 and 8 bpp CLUT graphics

– RGB16 graphics

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PAL/NTSC/SECAM video encoder

– RGB, CVBS, Y/C and YUV outputs with

10-bit DACs

– Encoding of CGMS, teletext, WSS, VPS,

closed caption

– Macrovision 7.01 copy protection

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Interfaces

– D1 input

– POD and dual DVB common interface

– 5 ASCs (UARTs) with Tx and Rx FIFOs

– 6 x 8-bit banks of parallel I/O

– 2 smartcard interfaces and clock generators

– 4 PWM channels

– Multichannel IR transmitter/receiver

– Low power/RTC/watchdog controller

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Package PBGA 35 x 35 (388)

PART NUMBERING

Table 1. Order codes

REVISION HISTORY

Table 2. Revision history

Par t Number

Description

STi5517ZUA

Development version, all options

STi5517AUA

Basic DVB

Date

Revision

Description of Changes

October-2004

First issue

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