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SPDC12L00010 Datasheet(PDF) 13 Page - STMicroelectronics

Part # SPDC12L00010
Description  10 A DC/DC converter module
PDF  24 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

SPDC12L00010 Datasheet(HTML) 13 Page - STMicroelectronics

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Application information
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5.4
Soft-start
The soft-start phase begins when both VCC and VIN raise above their turn-on thresholds,
otherwise the SS_INL pin is internally shorted to SGND.
A ramp is generated at SS_INL pin during start-up, charging the external capacitor CSS with
an internal current generator.
The initial value for this current is 30
μA and it charges the capacitor up to 0.5 V, after that, it
is reduced to 10
μA until the final charge value approximately 4 V.
In the meanwhile, the controller internal voltage reference raises to its final value, following
the SS_INL pin voltage slope.
During soft-start, the module provides a constant current protection, limiting the output
current at the maximum value, without entering in HICCUP mode.
If there is not current limitation, the output voltage slope follows the SS_INL pin slope.
The output voltage rise time, can be set choosing proper CSS value.
The soft-start phase ends when the SS_INL pin voltage reaches 3.5 V.
A capacitor CSS = 3 3 nF is present on the module, to perform a minimum soft-start time,
suitable for Co = 10000
μF max. output capacitor;
in this condition and with 10 A output current resistor load, the output voltage rise time is
around 5ms, but the complete soft-start time is around 10ms.
Using the minimum output capacitor Co = 660
μF and with 10 A resistor load, the output
voltage rise time is around 2 ms.
5.5
Multiple units synchronization
Using more than one unit on the same circuit, it is possible to synchronize the switching
frequency oscillators, connecting all SYNC (pin L6) together.
The device with the higher switching frequency will be the Master, while the other will be the
Slaves.
The best way to synchronize two or more devices is to set same switching frequency, in any
case, the switching frequencies can differ for a maximum of 50% of the lowest one.
Using and external clock signal, to synchronize one or more devices working at a different
switching frequency, it is recommended to follow the below formula:
fsw ≤ fext ≤ 1.3fsw
The phase shift between master and slaves is approximately 180°.



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