7549 datasheet(68/84 Pages) RENESAS

68 / 84 page

Rev.2.01

Oct 15, 2007

Page 68 of 81

REJ03B0202-0201

7549 Group

(5) Power-on reset circuit characteristics

Table 18 Power-on reset circuit characteristics

(VCC = 1.8 to 5.5 V, VSS = 0 V, Ta =

−20 to 85 °C, unless otherwise noted)

NOTE:

1. VPOR is the start voltage level of Vcc for the built-in power-on reset circuit to operate normally.

Keep VPOR to be lower than the Vcc voltage before rising of the Vcc power source to use the built-in power-on reset circuit.

Set the built-in low voltage detection circuit to be valid when the built-in power-on reset is used.

Table 19 Low voltage detection circuit characteristics

Low voltage detection circuit characteristics

(VCC = 1.8 to 5.5 V, VSS = 0 V, Ta =

−20 to 85 °C, unless otherwise noted)

NOTE:

1. VLVD is the start voltage level of Vcc for the built-in low voltage detection circuit to operate normally.

If the Vcc power source becomes lower than VLVD, first set the Vcc voltage to be lower than VPOR. Next, according to the electrical

characteristics of the power-on reset circuit, perform the rising of Vcc.

Fig 83. Electrical characteristics of power-on reset circuit and voltage drop detection circuit

VPOR

TW(VPOR)

TW(VPOR-VDET)

Valid start voltage of power-on reset circuit (Note)

VPOR hold time

Rising time of valid power source of power-on reset circuit

Symbol

Parameter

Limits

Unit

Min.

Typ.

Max.

TW(VPOR) > 10 s

Test conditions

VLVD

TW(VLVD)

TW(VLVD-VDET)

VDET-

V(VDET+- VDET-)

TDET

Valid start voltage of low voltage detection circuit (Note)

VLVD hold time

Rising time of valid power source of low voltage detection circuit

Detection voltage of low voltage detection circuit

Detection voltage Hysteresis (when hysteresis is valid)

Detection time of low 5voltage detection circuit

Symbol

Parameter

Limits

Unit

Min.

1.0

1.85

1.80

Typ.

1.95

0.10

µs

Max.

2.05

2.10

TW(VLVD) > 10 s

Ta = 0

−50 °C

Ta =

−20−85 °C

Ta =

−20−85 °C

Test conditions

Vcc power source

waveform

VPOR

0 V

TW(VPOR)T

T(VPON-VDET)

TDET

TW(VLVD)T

T(VLVD-VDET)

Note

VDET+

VDET-

Internal reset signal

Power-on reset circuit

characteristics

Low voltage detection circuit

characteristics

VPOR

Note: If schmitt of the voltage drop detection circuit is set to be invalid, system is released from reset at the timing of rising to

power source voltage VDET-.

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