SH7080 datasheet(39/1644 Pages) RENESAS

39 / 1644 page

Rev. 3.00 May 17, 2007 Page xxxix of Iviii

Section 16 Serial Communication Interface with FIFO (SCIF)

Figure 16.1 Block Diagram of SCIF........................................................................................... 790

Figure 16.2 Example of Data Format in Asynchronous Communication

(8-Bit Data with Parity and Two Stop Bits) ............................................................ 831

Figure 16.3 Sample Flowchart for SCIF Initialization ............................................................... 834

Figure 16.4 Sample Flowchart for Transmitting Serial Data...................................................... 835

Figure 16.5 Example of Transmit Operation (8-Bit Data, Parity, One Stop Bit)........................ 837

Figure 16.6 Example of Operation Using Modem Control (

CTS)..............................................837

Figure 16.7 Sample Flowchart for Receiving Serial Data .......................................................... 838

Figure 16.8 Sample Flowchart for Receiving Serial Data (cont)................................................ 839

Figure 16.9 Example of SCIF Receive Operation (8-Bit Data, Parity, One Stop Bit)................ 841

Figure 16.10 Example of Operation Using Modem Control (

RTS)............................................841

Figure 16.11 Data Format in Clock Synchronous Communication ............................................ 842

Figure 16.12 Sample Flowchart for SCIF Initialization.............................................................. 844

Figure 16.13 Sample Flowchart for Transmitting Serial Data.................................................... 845

Figure 16.14 Example of SCIF Transmit Operation................................................................... 846

Figure 16.15 Sample Flowchart for Receiving Serial Data (1)................................................... 847

Figure 16.16 Sample Flowchart for Receiving Serial Data (2)................................................... 848

Figure 16.17 Example of SCIF Receive Operation .................................................................... 848

Figure 16.18 Sample Flowchart for Transmitting/Receiving Serial Data................................... 849

Figure 16.19 RTSIO Bit, RTSDT Bit, and

RTS Pin...................................................................851

Figure 16.20 CTSIO Bit, CTSDT bit, and

CTS Pin ...................................................................852

Figure 16.21 SCKIO Bit, SCKDT bit, and SCK Pin .................................................................. 852

Figure 16.22 SPBIO Bit, SPBDT bit, and TXD Pin ................................................................... 853

Figure 16.23 Receive Data Sampling Timing in Asynchronous Mode ...................................... 856

Section 17 Synchronous Serial Communication Unit (SSU)

Figure 17.1 Block Diagram of SSU............................................................................................ 860

Figure 17.2 Relationship of Clock Phase, Polarity, and Data..................................................... 876

Figure 17.3 Relationship between Data Input/Output Pins and the Shift Register ..................... 878

Figure 17.4 Example of Initial Settings in SSU Mode ............................................................... 882

Figure 17.5 Example of Transmission Operation (SSU Mode).................................................. 884

Figure 17.6 Flowchart Example of Data Transmission (SSU Mode) ......................................... 885

Figure 17.7 Example of Reception Operation (SSU Mode) ....................................................... 887

Figure 17.8 Flowchart Example of Data Reception (SSU Mode)............................................... 888

Figure 17.9 Flowchart Example of Simultaneous Transmission/Reception (SSU Mode).......... 889

Figure 17.10 Conflict Error Detection Timing (Before Transfer) .............................................. 890

Figure 17.11 Conflict Error Detection Timing (After Transfer End) ......................................... 891

Figure 17.12 Example of Initial Settings in Clock Synchronous Communication Mode ........... 892

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