R8C2K datasheet(324/471 Pages) RENESAS

324 / 471 page

R8C/2K Group, R8C/2L Group

16. Timers

Rev.1.10

Dec 21, 2007

Page 307 of 450

REJ09B0406-0110

Figure 16.145 Operating Example of PWM3 Mode

Value in TRD0 register

Count source

TRDIOA0 output

0000h

FFFFh

TRDIOB0 output

m: Value set in TRDGRA0 register

n: Value set in TRDGRA1 register

p: Value set in TRDGRB0 register

q: Value set in TRDGRB1 register

TSTART0 bit in

TRDSTR register

Set to 0 by a program

m+1

n+1

m-n

p+1

q+1

p-q

Count stop

Output “H” at compare

match with the

TRDGRA1 register

Set to 0 by a program

Transfer

Following data

Transfer

Output “L” at compare match

with the TRDGRA0 register

Transfer from buffer register to

general register

Transfer from buffer register to

general register

Initial output “L”

j = either A or B

The above applies under the following conditions:

• Both the TOA0 and TOB0 bits in the TRDOCR register are set to 0 (initial output level “L”, output “H” by compare match with the

TRDGRj1 register, output “L” at compare match with the TRDGRj0 register).

• The BFC0 bit in the TRDMR register is set to 1 (the TRDGRC0 register is used as the buffer register of the TRDGRA0 register).

R8C2K Datasheet(PDF) 324 Page - Renesas Technology Corp

R8C2K Datasheet(HTML) 324 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL