R5F72115D160FPV datasheet(531/1228 Pages) RENESAS

Part #	R5F72115D160FPV

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family

PDF	1228 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)

Rev. 2.00 May. 08, 2008 Page 507 of 1200

REJ09B0344-0200

(p)

Counter Clearing by TGRA_3 Compare Match

In complementary PWM mode, by setting the CCE bit in the timer waveform control register

(TWCR), it is possible to have TCNT_3, TCNT_4, and TCNTS cleared by TGRA_3 compare

match.

Figure 10.68 illustrates an operation example.

Notes: 1. Use this function only in complementary PWM mode 1 (transfer at crest)

2. Do not specify synchronous clearing by another channel (do not set the SYNC0 to

SYNC4 bits in the timer synchronous register (TSYR) to 1 or the CE0A, CE0B, CE0C,

CE0D, CE1A, CE1B, CE1C, and CE1D bits in the timer synchronous clear register

(TSYCR) to 1).

3. Do not set the PWM duty value to H'0000.

4. Do not set the PSYE bit in timer output control register 1 (TOCR1) to 1.

TGRA_3

TGRB_3

TCDR

TDDR

H'0000

Output waveform

Output waveform is active-high.

Counter cleared

by TGRA_3 compare match

Figure 10.68 Example of Counter Clearing Operation by TGRA_3 Compare Match

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