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R5F72115D160FPV Datasheet(PDF) 851 Page - Renesas Technology Corp |
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R5F72115D160FPV Datasheet(HTML) 851 Page - Renesas Technology Corp |
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851 / 1228 page ![]() Section 19 Pin Function Controller (PFC) Rev. 2.00 May. 08, 2008 Page 827 of 1200 REJ09B0344-0200 19.1.3 Port B I/O Registers H, L (PBIORH, PBIORL) PBIORH and PBIORL are 16-bit readable/writable registers that are used to set the pins on port B as inputs or outputs. Bits PB30IOR to PB0IOR correspond to pins PB30 to PB0, respectively. PBIOR is enabled when the port B pins are functioning as general-purpose inputs/outputs (PB9, PB5, and PB4). In other states, PBIOR is disabled. A given pin on port B will be an output pin if the corresponding bit in PBIORH and PBIORL is set to 1, and an input pin if the bit is cleared to 0. Bit 15 of PBIORH is reserved. This bit is always read as 0. The write value should always be 0. PBIORH and PBIORL are initialized to H'0000 by a power-on reset; but are not initialized by a manual reset or in sleep mode or software standby mode. (1) Port B I/O Register H (PBIORH) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0000000000000000 R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Bit: Initial value: R/W: PB29 IOR PB28 IOR PB27 IOR PB25 IOR PB24 IOR PB23 IOR PB22 IOR PB21 IOR PB20 IOR PB19 IOR PB18 IOR PB17 IOR PB16 IOR - PB30 IOR PB26 IOR (2) Port B I/O Register L (PBIORL) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0000000000000000 R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Bit: Initial value: R/W: PB13 IOR PB12 IOR PB11 IOR PB9 IOR PB8 IOR PB7 IOR PB6 IOR PB5 IOR PB4 IOR PB3 IOR PB2 IOR PB1 IOR PB0 IOR PB15 IOR PB14 IOR PB10 IOR |
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