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H8S2615 Datasheet(PDF) 21 Page - Renesas Technology Corp |
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H8S2615 Datasheet(HTML) 21 Page - Renesas Technology Corp |
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21 / 479 page ![]() Rev. 2.00, 05/04, page xxi of xxxiv 14.6.1 Boot Mode ........................................................................................................... 343 14.6.2 Programming/Erasing in User Program Mode..................................................... 345 14.7 Flash Memory Emulation in RAM.................................................................................... 346 14.8 Flash Memory Programming/Erasing ............................................................................... 348 14.8.1 Program/Program-Verify ..................................................................................... 348 14.8.2 Erase/Erase-Verify ............................................................................................... 350 14.8.3 Interrupt Handling when Programming/Erasing Flash Memory.......................... 350 14.9 Program/Erase Protection.................................................................................................. 352 14.9.1 Hardware Protection ............................................................................................ 352 14.9.2 Software Protection.............................................................................................. 352 14.9.3 Error Protection.................................................................................................... 352 14.10 Programmer Mode ............................................................................................................ 353 14.11 Power-Down States for Flash Memory ............................................................................. 353 14.12 Note on Switching from F-ZTAT Version to Masked ROM Version............................... 354 Section 15 Clock Pulse Generator .................................................................................. 355 15.1 Register Descriptions ........................................................................................................ 356 15.1.1 System Clock Control Register (SCKCR) ........................................................... 356 15.1.2 Low-Power Control Register (LPWRCR) ........................................................... 357 15.2 Oscillator........................................................................................................................... 358 15.2.1 Connecting a Crystal Resonator........................................................................... 358 15.2.2 External Clock Input ............................................................................................ 359 15.3 PLL Circuit ....................................................................................................................... 361 15.4 Subclock Divider............................................................................................................... 361 15.5 Medium-Speed Clock Divider .......................................................................................... 361 15.6 Bus Master Clock Selection Circuit .................................................................................. 361 15.7 Usage Notes ...................................................................................................................... 362 15.7.1 Note on Crystal Resonator ................................................................................... 362 15.7.2 Note on Board Design.......................................................................................... 362 Section 16 Power-Down Modes...................................................................................... 365 16.1 Register Descriptions ........................................................................................................ 369 16.1.1 Standby Control Register (SBYCR) .................................................................... 369 16.1.2 Low-Power Control Register (LPWRCR) ........................................................... 371 16.1.3 Module Stop Control Registers A to C (MSTPCRA to MSTPCRC)................... 372 16.2 Medium-Speed Mode........................................................................................................ 374 16.3 Sleep Mode ....................................................................................................................... 375 16.3.1 Transition to Sleep Mode..................................................................................... 375 16.3.2 Clearing Sleep Mode............................................................................................ 375 16.4 Software Standby Mode.................................................................................................... 376 16.4.1 Transition to Software Standby Mode ................................................................. 376 16.4.2 Clearing Software Standby Mode ........................................................................ 376 |
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